What kind of gate is this

Discussion in 'General Electronics Chat' started by gammaman, Feb 20, 2009.

  1. gammaman

    Thread Starter Member

    Feb 14, 2009
    29
    0
    Code ( (Unknown Language)):
    1.  
    2. Library ieee;
    3. Use ieee.std_logic_1164.all;
    4. Entity ThisTable is
    5. Port(
    6.     D: in std_logic_vector(1 downto 0);
    7.     Y: out std_logic_vector(1 downto 0));
    8.    
    9. End ThisTable;
    10. Architecture Joe_Structure of ThisTable is
    11. Begin
    12. with D select
    13.     Y<= "01" when "00",
    14.         "00" when "01",
    15.         "11" when "10",
    16.         "11" when "11";
    17. End Joe_Structure;            
    18.  
     
  2. mik3

    Senior Member

    Feb 4, 2008
    4,846
    63
    The function can't be described by a particular gate. The function of the code is a combination of logic gates if you build it with discrete gate ICs.
     
  3. gammaman

    Thread Starter Member

    Feb 14, 2009
    29
    0
    Ok, so then what would the truth table be for this code.
     
  4. mik3

    Senior Member

    Feb 4, 2008
    4,846
    63
    Y<= "01" when "00",
    "00" when "01",
    "11" when "10",
    "11" when "11";


    You have it in the code, the bits after when are the inputs.
     
  5. kubeek

    AAC Fanatic!

    Sep 20, 2005
    4,670
    804
    Actualy it should be two functions, its easier to understand:
    Function a
    "0" when "00",
    "0" when "01",
    "1" when "10",
    "1" when "11";


    Function b
    "1" when "00",
    "0" when "01",
    "1" when "10",
    "1" when "11";
     
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