Clock signal named CLK, two inputs named A and S provided.

http://forum.allaboutcircuits.com/attachment.php?attachmentid=8277&stc=1&d=1238303907

 

When Q1 is high S appears at the input of the right flip flop.
When Q0 is high S appears at the input of the right flip flop inverted.
When both Q0 and Q1 are high, logic 1 appears on the input of the right flip flop whatever is the value of the S input.

Try to figure it out or use a simulation software to see the waveforms.