walking ones and walking zeros algorithm

Discussion in 'General Electronics Chat' started by sharath_412, Aug 20, 2007.

  1. sharath_412

    sharath_412 Thread Starter Active Member

    May 7, 2007
    Can anyone explain me about walking ones and walking zeros algorithm which is used in testing SDRAM.
  2. hgmjr

    hgmjr Moderator Staff Member

    Jan 28, 2005
    Tennessee, USA (GMT-6)
    Walking "1"'s and Walking "0"'s is a popular algorithm for testing all types of read/write memory not just SDRAM.

    It derives its name from the pattern that is written to memory during the test. The walking "1"'s (for a byte wide memory) involves writing a binary value "00000001" into the first location in read/write memory. The value is then shifted one position to the left so that the binary value is "00000010". This value is written to the next location in memory. When the "1" is left shifted out of the 8-bit value, the value "00000001" is reused and the left-shifting begins again from there. This pattern of left-shift by one bit then writing the new value to next memory location is repeated until all of the memory is written.

    Once all memory is written then the memory is read location by location and compared to the left-shifted pattern originally written.

    The walking "0"'s is the same algorithm with the exception that the pattern used begins with a "11111110" written to the first memory location and "11111101" is written to the second location.

    This test is intended to uncover data or address bus problems both internal to the memory device as well as external.


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