Voltage Spikes from Switching N-Channel MOSFETs with 3-Level PWM

Discussion in 'The Projects Forum' started by Mezzer26, Mar 24, 2016.

  1. Mezzer26

    Thread Starter New Member

    Jan 11, 2016
    17
    0
    Hi All,

    I'm working on creating a 3-level PWM signal to drive an H-bridge for an inverter. The circuit before the MOSFETs is working just fine, but when I try the switching section I get fairly substantial distortion from voltage spikes and then Vpos is turned on when for all practical purposes it should be off, or so I think. Is this from the MOSFETs I'm using to switch or is there a fundamental flaw in the design somewhere,maybe an LTspice artifact?

    Just some background on the circuit's operation, the square wave (Vsq) and triangle (Vtri) waves are summed in a non-inverting amplifier and then that signal is compared against a sine wave with a frequency equal to the square wave. There are two comparators there because I wanted a symmetrical waveform. Vneg is identical to Vpos every T/2 periods and then I use the MOSFETs to switch between Vpos and Vneg. Vsq is put through the inverter and to the Vneg gate to accommodate the T/2 shift.

    I'm pretty new to MOSFETs so any aid you could provide is much appreciated,
    Thanks

    Additionally, the final circuit will have a triangle wave that reaches a max of ~500kHz if I can pull it off. If not I'd aim for ~200kHz
    Main_Signal_Gen.JPG MainSig_Plot.JPG
     
  2. crutschow

    Expert

    Mar 14, 2008
    13,056
    3,245
    Your circuit is rather odd looking.
    What are U1, U2, and U3?
    Why do you have such a large resistor in series with the gates of M1? That will significantly slow its switching speed since MOSFETs have a large gate charge that has to be charged and discharged (see data sheet). Unless that's your intention, R8 should be reduced to about 10Ω
    R9 should also be reduced to 10Ω.
     
  3. Mezzer26

    Thread Starter New Member

    Jan 11, 2016
    17
    0
    They are just ideal op amps (universalopamp2)since I haven't nailed down the specs yet and they seem to be working fine since the waveforms before R3 and R6 are correct.

    The large gate resistor is me just playing around, your recommendation of 10 ohms did remove a lot of the spiking on Vneg's PWM signal however it still gets droped to -1 when not on and and has a large spike at the turn on and turn off times. This also occurs on Vpos and is on when it shouldn't be.

    Just out of curiosity what makes this circuit odd? Maybe those reasons are to blame.

    Here is the new waveform: V(n002) is the signal at the gate of M2
    upload_2016-3-24_14-4-36.png
     
  4. crutschow

    Expert

    Mar 14, 2008
    13,056
    3,245
    Why are you using large MOSFETs to gate the signal U2 and U3 (which is a low current signal).
    Perhaps part of my confusion is that I don't understand exactly what output waveforms you want. :confused:
    Can you explain that more precisely?
    Please post your .asc file.
     
  5. Mezzer26

    Thread Starter New Member

    Jan 11, 2016
    17
    0
    Hey Crutschow,

    Sorry for the late reply, I had two tests and some independent study stuff to get done. Below is an explanation of what I am trying to do if you are still interested with the schematic file attached.

    The first stage of the circuit takes a square wave with frequency, Fsq, and a triangle wave with frequency Ftri and then sums the two in a non-inverting summer. It is worth noting that Fsq = 20Ftri. From this point, you have a waveform that is a triangle but with alternating dc offsets. From here, I input the signal from the summer into comparators U2 and U3. U2 gives me a PWM sine wave for the first half of the square wave but is not correct for the second half of the period since I am using a full n-channel h-bridge. In order to amend this, I have put the signals into comparator U3 which is inverted form U2 giving me an identical waveform to the output of U2 but flipped so that the first half period of U2 in relation to Tsq is identical to the second half period of U3 in relation to Tsq. The MOSFETs are there to switch between the two comparator output signals since U2 provides the first half of a period and U3 provides the second half. The n-channel inverter is there to invert the Tsq signal so it switches at the correct time.

    Now after having thought about this a bit, I believe the simulation troubles come from the fact that there is nothing attached to source of the MOSFETs. Let me know if you think that sounds correct. To reiterate, the all N-channel h-bridge is not on the simulation and neither are the MOSFET drivers. Also, the PWM signal will drive the left side of the h-bridge and the square wave signal will drive the right side (this is what causes the bridge to switch at the desired frequency since Fsq is equal to the frequency of the load.

    Attached below are the outputs of the comparators and you can see how they behave with relation to the square wave.

    Thanks for any help or advice first period of wave.JPG second halfperiod.JPG
     
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