Voltage follower without voltage lost

Thread Starter

lcavini

Joined Sep 18, 2015
6
Hi all,
I need to drive with a PWM signal some led circuits (strip). The signal is generated by a microcontroller with a 20 mA maximum output current at 5 V power supply. Every led strip has a 15 Mohm input and output impedence and I observed a current lost of about 7 mA on every strip . So I want to design a little circuit for making an decoupling stage between two consecutive led strips. I thought to a voltage follower made by an op amp (e.g. MCP601 or TLV2371 or similar) for pumping to the output about 30 mA with an impedence adaption.
I have a doubt, because if I use a single power supply the maximum output voltage of the op amp stage in less than 5 V and also with a rail-to-rail behaviour I will lost gradually an amount of voltage on the PWM signal. Is it correct? And how can I solve the issue?

Thanks.

Marco
 

#12

Joined Nov 30, 2010
18,224
Please post a schematic of your circuits. It might help get some good answers, and be clear about whether you are talking about 15 Million ohms or 15 milli-ohms. Fifteen million ohms would indicate that 20 ma would activate about 60,000 LED strips. Fifteen milliohms would indicate that 20 ma would be useless. See the confusion factor?
 

Thread Starter

lcavini

Joined Sep 18, 2015
6
I need of a voltage follower because I want to decouple every led strip stage because ouput impedence should be as low as possible and the input impedence the opposite so full power can be transfered to the next stage. I use a standard notation, M = 10e6 and m = 10e-3.
Unfortunately I don't know as the led strip circuit is made, but I know how much current can be measured to the input and output line and what is the impedence at the input and output.
I drawn manually a little dirty schematic.
 

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Thread Starter

lcavini

Joined Sep 18, 2015
6
Thank you fanatic! I would like to understand better your solution. If I understood when the PWM signal goes to high value the n-MOS switches on and the p-MOS too because its Vgs is more negative than its Vth then Vout = Vdd. In the second case when the PWM signal goes to down value the n-MOS switches off and the p-MOS too because its Vgs is not negative than its Vth (=0 approximately). So with this circuit the impedence of the input stage is very high and for the output stage is very small! It's all so beatiful!! :D
I think that the resistance on drain line of the n-MOS should be as big as possible.

Is it correct? I drew an equivalent circuit to explain what was said above.
 

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#12

Joined Nov 30, 2010
18,224
My moniker is Number Twelve.
This is what I call a double invert circuit. You end up with the output doing exactly what the input is doing, but you can optimize it for different purposes, usually higher current. This one is optimized for least voltage loss in the output stage.

The missing information is about speed. How fast are you switching? With high speeds, the resistances become more important because of the capacitance of the mosfet gates.
Have you decided whether to use the dual mosfet chip or drive a separate mosfet with a bipolar transistor?
If you're doing a bunch of these, the chip method will be more convenient to build and less bulky. If you can use only one double-invert circuit, the discrete option is better because the final mosfet can be HUGE.

You see, the gate of the final mosfet has capacitance. The resistor connected to +5V must charge that capacitance quick enough for your switching speed. The higher the speed, the lower the resistance must be and the more current the first transistor must allow when "on". So, all the math starts with switching speed and the gate specs on which mosfet you want to use.

Talk to me.

ps, your resistance measurements are bogus. You can't drive 10 ma through 15 megs with 5 volts. The input resistance must be more like 500 ohms. It doesn't really matter right now because I can work with what you told me, so far.
 

Thread Starter

lcavini

Joined Sep 18, 2015
6
:D ahahha, sorry #12!! I did a mistake with your member level, I think caused by the late time.
My PWM signal has a frequency of about 1 or 2 KHz. I understood what you mean but the datasheet talks about nano seconds to turn on and off the transistor so I think is not a problem with my frequency. So I think that the only constraint with my resistance choise is imposed by the output current. Is it correct?

Thank you.
 

#12

Joined Nov 30, 2010
18,224
The resistance that charges the gate capacitance has nothing to do with output current. That is inherent in the mosfet and modified by how much the voltage on the gate has changed.
The gate must charge up toward V+ to a stopping condition at least 10 times as fast as your PWM speed. You did not choose a mosfet as I requested so I can not tell you the capacitance of the gate or the resistance that will be needed. Then I can not tell you how much current the first transistor must carry to oppose the resistor I can not name.
 

Thread Starter

lcavini

Joined Sep 18, 2015
6
I was talking about the resistance because you said me this:

The higher the speed, the lower the resistance must be and the more current the first transistor must allow when "on"
so if it's not a problem to choose a resistance to satisfy the frequency constraint for charging the gate capacitance (thinking about RC circuit the time to charge the capacitor depend on the resistance and capacitance, so for high frequency I thought about a small value of the resistance) the only constraint to satisfy is about the voltage applied to the gate, as you said. Do you think that it's wrong?

I think I will choose the option based on two mosfet in a single package (BSL316C or BSL308C) because 50 or 100 mA at the output of every buffer stage would be enough and the integrated solution should be able to provide about 1 A of current. I can add one buffer stage every #n led strips to pump the current.
 

Thread Starter

lcavini

Joined Sep 18, 2015
6
I tried to simulate the circuit by using PSPICE and the models of n- and p-channel MOSFET provided for BSL308C. As load of the double inverter stage you can see a little circuit which represents the input stage of every strip (a npn transistor with PWM at its input controls a current buffer and the input pin of this buffer has a resistance of about 50K).

Is it correct for you?

Thank you for your help.
 

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#12

Joined Nov 30, 2010
18,224
I calculate that R1 can not be more than 39K. Anything below that much resistance will run fast enough.

You have plenty of room below 39k that will not cause enough current to be a significant load on the first mosfet, so you're in easy territory.
 
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