Vias under Die Pad

Discussion in 'General Electronics Chat' started by tallman, Jan 11, 2014.

  1. tallman

    Thread Starter New Member

    Sep 9, 2013
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    I'm layout out flex FPC with an Atmel D20 Cortex 0 QFN mount, and it has a die pad (thermal pad).

    Am I allowed or better is it normal, to run my traces under my chip using vias under the thermal pad like I would on a regular pin version of the chip? Seems like a risk of vias accidently shorting on the die pad, but I can't find anything say do or don't do.

    I read that people put Via's to help disappate the heat, but I'm not asking that about that.

    Thanks for the help.
    Brent
     
  2. mcgyvr

    AAC Fanatic!

    Oct 15, 2009
    4,769
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    If there is a metallic pad under the IC its probably intended to be soldered to the board to act as part of the thermal path.. then no you can't put traces there..
     
  3. tallman

    Thread Starter New Member

    Sep 9, 2013
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    0
    There is a metal pad, but in the chip specs it's not connected to the chip. It's for thermal. I'm not running chip enough that thermal will be much of a concern.
     
  4. tallman

    Thread Starter New Member

    Sep 9, 2013
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    Thanks for the insight. I kind of suspected it, but hoped I could.

    Brent
     
  5. ErnieM

    AAC Fanatic!

    Apr 24, 2011
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    1,605
    Once in an incredibly tight build I used the land underneath a leadless DFN package for traces, and very possibly vias too. That device had an underside pad for a thermal path, but my dissipation in the device was near zero so I had no need for the extra thermal path.

    I made perhaps 20 samples of this device with no failures due to a short there that I identified (meaning it may have shorted in my drop out units but I never noticed or identified that short).

    So... while not common, not recommended, you may get away with it in some cases.
     
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