VHDL Testbench

Discussion in 'Homework Help' started by janner, Dec 9, 2009.

  1. janner

    Thread Starter New Member

    Nov 15, 2009
    6
    0
    Hi Guys,

    I have just started learning about VHDL and I need to know the basics so Ive been reading loads but I cant seem to get any information on what a VHDL Testbench is or its advantages. Can anyone just explain what it is so I can at the very least get some sort of idea of how it works?

    Cheers

    J
     
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