Dear All,
I am reasonably new to VHDL (this is my first big project) and my tools are throwing up lots of warnings around how I'm using count_buf_v and count_cnt_v in this example code pasted below. In simulation everything works fine.
Here is an example warning:
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <count_buf_v_8> (without init value) has a constant value of 0 in block <PWM_assymetric_1>. This FF/Latch will be trimmed during the optimization process.
Here is the code:
Any input as to whether I should be worried or not would be much appreciated.
Thanks in advance,
James
I am reasonably new to VHDL (this is my first big project) and my tools are throwing up lots of warnings around how I'm using count_buf_v and count_cnt_v in this example code pasted below. In simulation everything works fine.
Here is an example warning:
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <count_buf_v_8> (without init value) has a constant value of 0 in block <PWM_assymetric_1>. This FF/Latch will be trimmed during the optimization process.
Here is the code:
Rich (BB code):
BEGIN
PWM_GENERATE : PROCESS(clk, rst_n) IS
variable count_buf_v : unsigned(COUNTER_SIZE-1 DOWNTO 0);
variable count_cnt_v : unsigned(COUNTER_SIZE-1 DOWNTO 0);
BEGIN
IF rst_n = '0' THEN
pwm <= '0';
count_max <= (OTHERS => '1');
count_buf_v := unsigned(count_set);
count_cnt_v := conv_unsigned(0, COUNTER_SIZE);
ELSIF rising_edge(clk) THEN
count_cnt_v := count_cnt_v + 1;
IF (reset_set = '1') THEN
pwm <= '0';
count_buf_v := conv_unsigned(0, COUNTER_SIZE); -- Shadow registration override
ELSIF (count_cnt_v = conv_unsigned(0, COUNTER_SIZE)) THEN -- Natural wrapping
count_buf_v := unsigned(count_set); -- Shadow registration
pwm <= '0';
ELSIF (count_cnt_v <= count_buf_v) AND (count_cnt_v <= count_max) THEN
pwm <= '1';
ELSIF (count_cnt_v > count_buf_v) AND (count_cnt_v <= count_max) THEN
pwm <= '0';
END IF;
END IF;
END PROCESS PWM_GENERATE;
END ARCHITECTURE rtl;
Thanks in advance,
James