1. divyasharma

    Thread Starter New Member

    May 30, 2012
    1
    0
    need a program for different faults like ssa(0/1),delay fault, bridge etc.
     
  2. kubeek

    AAC Fanatic!

    Sep 20, 2005
    4,670
    804
    What? I think there is no way to induce faults in VHDL design, apart from acutally typing the errors inside your code.
    If you are trying to verify your design based on possible faults, there may be some tools for that, but I think this would be better done on a piece of paper.
     
    divyasharma likes this.
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