VHDL counter by 1's and 2's problem

Discussion in 'Programmer's Corner' started by Titanicsailson, Nov 21, 2008.

  1. Titanicsailson

    Thread Starter New Member

    Nov 21, 2008
    2
    0
    I am creating a counter using VHDL and a DE2 board. Its for a scoreboard I want to eventually make for a project and I want it to count by 1's and two's so its like a scoreboard for a basketball game with no three pointers. I have been able to make it count by 1's seperately and two's seperatly but I cant get it to work for both. Ill paste my code below. Can someone please look it over and tell me what they think is wrong. Im hoping its just a stupid mistake but I appreciate any help.

    Thank you

    --------------------------------
    LIBRARY ieee;
    USE ieee.std_logic_1164.all;
    --------------------------------
    ENTITY counter IS
    PORT (clk, inp, rst: IN STD_LOGIC;--Manual Clock--
    digit1,digit2 : OUT STD_LOGIC_VECTOR (6 DOWNTO 0));
    END counter;
    --------------------------------
    ARCHITECTURE counter of counter IS
    BEGIN
    PROCESS(clk, rst, inp)
    VARIABLE temp1: INTEGER RANGE 0 TO 10;
    VARIABLE temp2: INTEGER RANGE 0 TO 10;
    VARIABLE inc: INTEGER RANGE 0 TO 2;
    BEGIN
    ------------ counter: -------------------
    IF (inp='1') THEN --If high then adds by 1
    inc := 1;
    ELSE inc := 2; --- IF low then adds by 2
    IF (rst='1') THEN
    temp1:= 0;
    temp2:= 0;
    ELSIF (clk'EVENT AND clk='1') THEN
    temp1 := temp1 + inc;
    ----------Digit Carryover-------
    IF (temp1=10) THEN
    temp1:= 0;
    temp2:= temp2 + 1;
    IF (temp2=10) THEN
    temp2 := 0;
    If (inp='0' AND temp1=9) THEN
    temp1:= 1;
    temp2:= temp2 + 1;
    END IF;
    END IF;
    END if;
    END IF;
    END IF;
    -------------BCD to SSD conversion: -------------------
    CASE temp1 IS
    WHEN 0 => digit1 <= "1111110"; --7E
    WHEN 1 => digit1 <= "0110000"; --30
    WHEN 2 => digit1 <= "1101101"; --6D
    WHEN 3 => digit1 <= "1111001"; --79
    WHEN 4 => digit1 <= "0110011"; --33
    WHEN 5 => digit1 <= "1011011"; --5B
    WHEN 6 => digit1 <= "1011111"; --5F
    WHEN 7 => digit1 <= "1110000"; --70
    WHEN 8 => digit1 <= "1111111"; --7F
    WHEN 9 => digit1 <= "1111011"; --7B
    WHEN OTHERS => NULL;
    END CASE;
    -------------------------------------
    CASE temp2 IS
    WHEN 0 => digit2 <= "1111110"; --7E
    WHEN 1 => digit2 <= "0110000"; --30
    WHEN 2 => digit2 <= "1101101"; --6D
    WHEN 3 => digit2 <= "1111001"; --79
    WHEN 4 => digit2 <= "0110011"; --33
    WHEN 5 => digit2 <= "1011011"; --5B
    WHEN 6 => digit2 <= "1011111"; --5F
    WHEN 7 => digit2 <= "1110000"; --70
    WHEN 8 => digit2 <= "1111111"; --7F
    WHEN 9 => digit2 <= "1111011"; --7B
    WHEN OTHERS => NULL;
    END CASE;
    END PROCESS;
    END counter;
     
  2. Titanicsailson

    Thread Starter New Member

    Nov 21, 2008
    2
    0
    Does anybody know whats going on with it?
     
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