VHDL code for 32 bit wallace tree multiplier please.....

Discussion in 'Programmer's Corner' started by seethala, Dec 13, 2006.

  1. seethala

    Thread Starter New Member

    Dec 13, 2006
    1
    0
    I am working on project "Multiplier RC6 Encryption" I need VHDL code for the 32 bit wallace tree multiplier for that.If any one has it please help me.....
     
  2. n9352527

    AAC Fanatic!

    Oct 14, 2005
    1,198
    4
    If you insist on ready to use code, then most probably no one in this forum would be willing to provide you with one (at least not me :D). However, if you are willing to code the function yourself, then I'm sure there are members of this forum that are able to help you.

    For a start, if you are not familiar with Wallace Tree multiplier, have a look at Wikipedia article to get an idea on how it works. There are also other resources available on the net on that subject. Google is your best friend.

    If you decide to have a go and encounter any problem, then you can post here and we will try to help you iron it out.
     
  3. Dave

    Retired Moderator

    Nov 17, 2003
    6,960
    144
    I fully concur. Given that a Wallace Tree Multiplier is what one would consider to be a niche design (although common), it is unlikely that someone has working code to hand.

    You also neglect to say how proficient (if at all) you are at writing VHDL code.

    Remember, whatever you put into these forums you will certainly get out.

    I am also moving this to the Programmers Corner forum where it is better suited.

    Dave
     
  4. Dave

    Retired Moderator

    Nov 17, 2003
    6,960
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    Dummy post... browser crash caused the above post no to show.
     
  5. VHDLCoder

    New Member

    Oct 17, 2011
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    0
    You can find a generic implementation of a wallace tree multiplier here: Generic VHDL Wallace Tree Multiplier

    This implementation uses a small set of recursive functions to identify the number of applicable bits at a given layer. The main code then maximizes the number of 3:2 compressors (full adders) followed by 2:2 compressors (half adders) and then wires.

    The final partial sums are fed into a generic Brent-Kung adder (a type of carry tree adder like other carry look-ahead adders including the Kogge-Stone adder).

    Hope that helps!

    VHDLCoder
     
  6. Wendy

    Moderator

    Mar 24, 2008
    20,766
    2,536
    This thread is 5 years old. The OP is long gone, along with most of the other folks on this thread.

    You are talking to yourself here.
     
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