VHDL code for 1-bit multiplication

Discussion in 'Programmer's Corner' started by SLAMI, Apr 29, 2009.

  1. SLAMI

    Thread Starter New Member

    Apr 29, 2009
    2
    0
    Hi guys;

    I need help to write a VHDL code. I don't have any experience with VHDL and I have to write a code for this circuit.

    [​IMG]

    The circuit is only for 1-bit multiplicand and 1-bit multiplier.

    a: 1-bit multiplicand
    b: 1-bit multiplier
    PPi: Bit of incoming partial product
    PP(i+1): Bit of outgoing partial product

    If you help me guys I'll appreciate your effort and I will learn how to start using VHDL codes

    thank you
     
  2. SLAMI

    Thread Starter New Member

    Apr 29, 2009
    2
    0
    I wrote this code after I read some sources
    Can anyone check it:

    library ieee;
    use ieee.std_logic_1164.all;
    use ieee.std_logic_arth.all;​

    ENTITY Multiplier IS PORT(​

    A: IN std_logic;
    B: IN std_logic;
    Cin: IN std_logic;
    PPi: IN std_logic;
    PP(i+1): OUT std_logic;
    Cout: OUT std_logic);​

    END Multiplier;​

    ARCHITECTURE Behavioral OF Multiplier IS
    BEGIN
    PROCESS (A, B, PPi, Cin, PP(i+1), Cout)
    BEGIN
    q:= A AND B
    PP(i+i)<= q XOR B XOR Cin;
    Cout<= (q AND PPi) OR (B AND Cin) OR (A AND Cin);​

    END PROCESS;
    END Behavioral;​
     
  3. dsp_redux

    Active Member

    Apr 11, 2009
    182
    5
    I guess q is supposed to be declared as a signal.
     
  4. tuborggg

    Active Member

    Jan 3, 2009
    37
    0
    and PP(i+1) should be called pp_i_plus_1 or something like that...
     
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