# URGENT: MTBF equtaion of a 2-FF synchronizer

Discussion in 'General Electronics Chat' started by Anonumous, Jan 20, 2015.

1. ### Anonumous Thread Starter New Member

Jan 20, 2015
2
0
Hi,

I am not to familiar with the MTBF derivation and need to understand it and also confirm what the MTBF equation of a standard 2 Flip-flop synchronizer is. Please let me know if the below equations are correct:

MTBF of a single flop synchronizer = exp(Tres/τ)/ (Fclk*Fd*To)
MTBF of a double flop synchronizer = exp((Tres+Tclk-Tsu2)/τ)/ (Fclk^2*Fd*To^2)

Where:
Tres = resolution time of the FF
τ = FF const
Fclk/Tclk = Frequency/Period of clock to FFs
Fd = data frequency
To = suseceptible window taken into consideration
Tsu2 = setup time of second FF in 2 FF sync

Reference :
http://www.edn.com/electronics-news/4356211/Keep-metastability-from-killing-your-digital-desig
(Calculating MTBF for a 2-stage synchronizer)

If anyone has materials or a reference of a detailed explanation of the derivations or could confirm if the equations are correct it would be really healpful.

Thanks

2. ### Anonumous Thread Starter New Member

Jan 20, 2015
2
0

On the other hand the below link gives this eqauation for a 2-FF sync:

MTBF=MTBF1*MTBF2=exp((Tr1+Tr2)/τ)/((Fclk*Fd*To))

Reference: http://www.eeweb.com/blog/ray_andraka/metastability-and-clock-uncertainty-in-fpga-designs

Could someone also tell me how the resolution time of a FF is arrived at ? Is there any equation or derivation?

Thanks