Up/Down Triggered 3-Bit Binary Counter

Discussion in 'The Projects Forum' started by wolfman29, Aug 20, 2013.

  1. wolfman29

    Thread Starter New Member

    Dec 11, 2012
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    Hey everyone. Long time reader, first time poster. I guess I'll get right down to business.

    I have a project that requires, on two separate button pushes, a single count up, and single count down, respectively. I am working from a li-ion supply of 3.7-4.2V, which is fine (I think). This must be a binary counter from 000 to 111. This output will then be redirected to a home-brewed DAC to modulate a laser driver. But that's beside the point.

    At the moment, I am working with (and having trouble with) the SN74HC193.

    The schematic I was using is shown below:

    [​IMG]

    When I tried this, it didn't work at all as expected! There was no discernible pattern in the outputs. Sometimes it would work, sometimes it wouldn't - would fluctuate on its own without any changes in state.

    Then, I tried connecting 14 (CLR) to GND and 11 (LOAD) to VCC. That gave me better results (the outputs seemed to be stable, at least). However, it still wasn't counting properly. It would "randomly" skip counts, etc. Further, upon start-up, it wasn't in the zero state (which I would like).

    Is there something I am doing wrong? Am I using the wrong IC? I was thinking of trying out this: http://www.ti.com/lit/ds/symlink/cd74hc192.pdf.

    Thanks for reading!

    P.S. I did try the search bar, but nothing seemed to adequately answer my questions.
     
  2. MrChips

    Moderator

    Oct 2, 2009
    12,415
    3,354
    Welcome to the forum.

    You cannot use push-buttons by themselves. They must be debounced.

    Here are two ways to debounce push-buttons.
    Since you are already using SPDT switches, use the first circuit. Use CMOS circuits such as 74HC00 and increase the resistances to 10kΩ.

    [​IMG]
     
  3. wolfman29

    Thread Starter New Member

    Dec 11, 2012
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    0
    Hmm. I hadn't even considered the bounce on the switch! It's amazing that these little ICs read so quickly that they notice the jiggle from the switch. And it makes perfect sense.

    To be honest, I am actually using SPST switches. That was just the only schematic part that I had on hand (that I could find, anyway). They are simple off-mom switches with one pin between the two resistors and the other end at GND. I just realized how much confusion that adds >.>

    So is it alright that I don't have an actual clock? I'm new to this whole digital thing. I typically only work in analog.

    EDIT: I am looking at that second circuit that you laid out, and I am not understanding how this will help me. Wouldn't I not want the inverter there? I mean, I need each UP/DOWN pin to be high at all times until the button is pressed. Right? So they will be high when open until the button is pressed, at which point they close, the capacitor charges, and the bounce is reduced?
     
  4. crutschow

    Expert

    Mar 14, 2008
    12,977
    3,221
    Another problem with you circuit is that CMOS inputs are undefined when open circuited as occurs when the switch in you circuit is open. You need a resistor to ground at the input to pull the inputs low when the switch is open. (That will be taken care of with a proper debounce circuit).
     
  5. wolfman29

    Thread Starter New Member

    Dec 11, 2012
    5
    0
    Yeah, take a look at the correction I made - that isn't the right schematic. Replace the SPDTs with SPSTs connected between the two resistors and GND.
     
  6. WBahn

    Moderator

    Mar 31, 2012
    17,715
    4,788
    Not only do modern logic circuit read fast enough to see switch bounce, but they can even see thousands of bounces in a single switch event. What you were seeing was your circuit rapidly cycling through it sixteen possible states and effectively ending up in a random state once everything settled.

    You can always flip the circuit (or add another inverter) to get the polarity you want/need.

    You need to make sure ALL the inputs of CMOS circuits are at established logic levels and not floating. ALL. Not just the ones you are using. ALL of them. This includes the ABCD preload inputs, LOAD, and CLR. I'm assuming DO and CO are outputs (Digit Out and Carry Out?) and, if so, leave them floating.
     
  7. wolfman29

    Thread Starter New Member

    Dec 11, 2012
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    0
    Hmm. I wasn't aware that I needed the CMOS inputs needed to be at established logic levels. I suppose I could just connect them to GND or VIN. I suppose this is less than an easy fix of just paralelling the switch with a capacitor then :( I was hoping I wouldn't have to redesign my PCB! Hah. Well, maybe I won't. Maybe I'll find an easy enough way!

    EDIT: So instead of using two inverter/Schmitt triggers, could I just use a single one of these: http://www.diodes.com/datasheets/74LVC1G17.pdf

    I figure it would do the same as two inverters in series, no?

    EDIT 2: For ease of rewiring, do you think I could wire up any of the non-used inputs to any logic level (A, B, C, and D)? I was thinking I could just hook those inputs up to one of the binary outputs since it doesn't matter what state they are in. Right?

    EDIT 3: I was just thinking... is there any sort of part I could just replace the switch with and then trigger THAT with a switch to reduce part count? Cost isn't really an issue. I was thinking a relay, but something that doesn't latch....
     
    Last edited: Aug 21, 2013
  8. MemT

    New Member

    Mar 1, 2013
    6
    0
    hello, for the logic level you can use pull up insted of pull down and one inverter to do the job, or the lacht with the /Q or Q that you like

    EDIT 2: it depents, there is a guia for wiring the unused pins to gnd or vcc is a matter of the IC, read the datasheet will help with that part.

    EDIT 3: ?????
     
  9. wolfman29

    Thread Starter New Member

    Dec 11, 2012
    5
    0
    I don't understand. Can you reexplain? That didn't make any sense to me.
     
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