Hi Everyone,
I'm currently reading Electronic Principles 7th Edition by Albert Malvino. In chapter 24 (pg 978), the book discusses a buck regulator. I attached an image so that you can better understand what I'm asking.
In discussing the action of this circuit, it is stated that the comparator controls the duty cycle of the PWM. When the power is first turned on, there is no output voltage and no feedback voltage on R1-R2. Thus the comparator output ir large and duty cycle is near 100%. However, as the output voltage builds, the feedback voltage reduces the comparator output, thereby reducing the duty cycle.
How can the comparator's output be reduced? My understanding was that a comparator produced either a high or a low saturated signal.
I'm currently reading Electronic Principles 7th Edition by Albert Malvino. In chapter 24 (pg 978), the book discusses a buck regulator. I attached an image so that you can better understand what I'm asking.
In discussing the action of this circuit, it is stated that the comparator controls the duty cycle of the PWM. When the power is first turned on, there is no output voltage and no feedback voltage on R1-R2. Thus the comparator output ir large and duty cycle is near 100%. However, as the output voltage builds, the feedback voltage reduces the comparator output, thereby reducing the duty cycle.
How can the comparator's output be reduced? My understanding was that a comparator produced either a high or a low saturated signal.
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