Two stage CMOS op-amp design

Discussion in 'Homework Help' started by casi2013, Mar 23, 2013.

  1. casi2013

    Thread Starter New Member

    Mar 23, 2013
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    0
    Hi guys,
    i'm going crazy with the design of a two stage op-amp in CMOS technology.

    basically I have these following information:

    1)Dual power supply +(-) 3V
    2)A(0) = 10^3
    3)Gain–bandwidth product 100 kHz
    4)Rin > 100M and Rout < 10k

    That's all!

    I'm thinking to set by myself value like threshold voltage and process transconductance, and use Rout and A(0) somehow in order to obtain the Id on the output stage of the amplifier, then find the form factor of this Mosfet and move to the others. This is totally out of mind?

    Could someone help me please?
     
  2. casi2013

    Thread Starter New Member

    Mar 23, 2013
    4
    0
    Nothing to say? Any suggestion? I'm "playing round" but I need some kind of help.

    Thanks
     
  3. WBahn

    Moderator

    Mar 31, 2012
    17,715
    4,788
    Don't be so impatient. People here have lives and need to sleep from time to time. New threads sometimes go a week or more before getting answered.

    What you need to do is make your best attempt at a design and post it and then we can use that as the starting point for discussion. It's fine if you have to fight with a design and struggle a bit -- that's actually about the best way to learn.
     
    DerStrom8 likes this.
  4. casi2013

    Thread Starter New Member

    Mar 23, 2013
    4
    0
    Yes, you're right, but I'm reading on several books and the design approach is totally different. here I have not load capacity, or slew rate. I think the information about Rin is not useful... I mean, input voltage is on the gate of MOS, this is right?
    How can I find the correct bias current and sizing mosfets?
     
  5. WBahn

    Moderator

    Mar 31, 2012
    17,715
    4,788
    Again, make your best attempt and post it so that we have something to start discussions from. There are many different ways to design an amplifier so a question like "input voltage is on the gate of the MOS" is all but meaningless unless we have some context.
     
  6. casi2013

    Thread Starter New Member

    Mar 23, 2013
    4
    0
    I did it...
    http://imageshack.us/a/img199/6958/immagine5w.png
    I'm relatively free. So I can choose L e W of each mosfet, current of each branch, and I have not information about process transconductance parameter and threshold voltage.
    My first attempt was to set tipical value for kp (12,5 uA/V^2) and kn (25 uA/V^2), a threshold voltage of 0,7 V and a overload voltage of 200mV.
    I set for each stage a gain value in order to have Av=Av1*Av2=10^3

    where Av1 and Av2 are calculated like:
    [​IMG]
    [​IMG]

    where lambda is the Va^-1

    At the end I want set Cc and Rc, feedback line, with the purpose to have Rin High and Rout Low.

    Like that i'm not using information about Vdd and Vss. Could be?
     
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