Hi everyone,
This is my first post on this forum and I was wondering if anyone would be willing to help me with a project I am currently working on.
What the included schematic is "supposed" to do is to generate a gate of adjustable width once a trigger signal has been detected by the comparator.
The input signal to be expect is a positive going signal with 100 nsec rise time, and 140 usec decay. The pulse amplitude will be around 400 mV and I plan to set the Vref around 100 mV.
Would there be a problem with having the GATE output also controlling a transistor which turns on an LED as an indication? Or should I use the other unused monostable to generate the control signal for the LED?
The other questions, is more of a request to have someone look over the schematic for me for some obvious errors.
Thanks
This is my first post on this forum and I was wondering if anyone would be willing to help me with a project I am currently working on.
What the included schematic is "supposed" to do is to generate a gate of adjustable width once a trigger signal has been detected by the comparator.
The input signal to be expect is a positive going signal with 100 nsec rise time, and 140 usec decay. The pulse amplitude will be around 400 mV and I plan to set the Vref around 100 mV.
Would there be a problem with having the GATE output also controlling a transistor which turns on an LED as an indication? Or should I use the other unused monostable to generate the control signal for the LED?
The other questions, is more of a request to have someone look over the schematic for me for some obvious errors.
Thanks
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