Transmitter and Receiver design

Discussion in 'The Projects Forum' started by Jayasurya Pitchuka, Apr 14, 2016.

  1. Jayasurya Pitchuka

    Thread Starter New Member

    Apr 14, 2016
    4
    0
    I am working with Transmitter and receiver design using an interconnect. At the transmitter side i am using a current mirror with a current of 100uA. On the top of that i have used another MOSFET which gets the digital input. depending on whether the input is high or low the MOS will turn on and off respectively. When the MOS is on the current mirror sends the current through it resulting in transmission. similarly for the off state also. The problem here is as the MOS is turning on and off very fastly from 0 to Vdd ..... I am getting spikes in the transmission current (i am working at 200Khz) due to parasitic capacitances..... So please help me how to get rid of those spikes or if you have any other idea how to design the transmitter side to transmit current to the reciever side..then please share it.....

    I am attaching the transmitter side circuit below....
     
  2. #12

    Expert

    Nov 30, 2010
    16,248
    6,745
    Your impedance is way too high to empty the charge out of 200 pf at 200KHz. Use Eo = dV times e^(-time/RC) to find how much you can change the voltage on that capacitor in the time allowed.
     
  3. Jayasurya Pitchuka

    Thread Starter New Member

    Apr 14, 2016
    4
    0
    Thanks .... can you suggest any methods for designing that sort of circuit using some transmission gate method or something else....
     
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