Transistor Latching trouble

Discussion in 'General Electronics Chat' started by odm4286, Nov 29, 2015.

  1. odm4286

    Thread Starter Active Member

    Sep 20, 2009
    155
    5
    Well, here is my circuit with an explanation that follows. Hopefully someone can help me out :)

    [​IMG]

    Here is my logic, or lack thereof

    1. S1 closes, Q1 goes High, charging C1, Q3 also goes High
    2. S1 opens, Q1 base goes low, Q2 goes high, Q3 stays High from C1
    3. This should latch Q1 right?

    By high I mean on. Sorry, im coming from PLCs and C so this is new for me.
     
  2. dl324

    Distinguished Member

    Mar 30, 2015
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    Your circuit won't work. Try Googling "cross coupled inverter latch".
     
  3. absf

    Senior Member

    Dec 29, 2010
    1,493
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    You are making a transistor latch? You need an NPN plus a PNP transistor connected as attached...

    But it is easier to just use a SCR.

    transistor scr.PNG
     
    #12 likes this.
  4. odm4286

    Thread Starter Active Member

    Sep 20, 2009
    155
    5
    Thanks or the help. I could use a SCR but I am still in the learning process and wanted to see if I could figure it out at the transistor level.
     
  5. odm4286

    Thread Starter Active Member

    Sep 20, 2009
    155
    5
    Could you explain some of the theory behind the first circuit? I've read up on it and got it to work in the simulator but I still can't wrap my head around it.

    Here is what I understand
    1. Push button switch is closed, pulling base of Q1 high turning Q1 on
    2. Q1 pulls base of Q2 low which turns Q2 on

    Here is where I get confused
    3. Push button switch is opened, Q1 stays on but how? At this point wouldn't the base of Q1 be pulled low by the collector of Q2? Turning Q1 off?
     
  6. BillB3857

    Senior Member

    Feb 28, 2009
    2,400
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    When the button is pressed current through Q1 causes voltage drop across R2 (lower end being more negative than top end) putting base of Q2 more negative than emitter of Q2. This keeps Q2 on. Q2 being ON keeps base of Q1 positive, thereby keeping Q1 ON
     
  7. AnalogKid

    Distinguished Member

    Aug 1, 2013
    4,542
    1,251
    In your schematic in post #1, which device pin or node is the intended output? Do you just want an output to latch up in the high state while the button is released? Do you have a reset mechanism other than removing circuit power?

    Q2 won't work the way you describe because it is connected incorrectly. But if it did... if Q2 holds the output high after the button is released, why wasn't it holding the output high before the button was pressed. Think through the logic of all three states, before press, pressed, after pressed.

    ak
     
  8. dl324

    Distinguished Member

    Mar 30, 2015
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    absf likes this.
  9. dl324

    Distinguished Member

    Mar 30, 2015
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    The OP never came back, but I'll post this info anyway...

    An interesting option exists when using two transistors for the SCR. Using transistors makes it more feasible to use it as an SCS (Silicon Controlled Switch) which allows the device to be turned on and off with pulses vs interrupting power. This won't work for most SCRs because of the geometries used for the PNPN regions.

    For the circuit below, supplying a negative transition will turn the SCS on and a positive transition will turn it off.
    upload_2015-12-1_14-39-56.png
    I breadboarded the circuit to verify that it works. One potential problem is that if you is that if you start probing on the base with a voltmeter, you can cause the switch to flip.
     
    Last edited: Dec 1, 2015
    AnalogKid and absf like this.
  10. dl324

    Distinguished Member

    Mar 30, 2015
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    ...I would have gone with an SR flip flop using cross coupled inverters. For a one switch solution, I would have gone with 3 inverters, 2 resistors, a cap, and a pushbutton/momentary switch.
     
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