Transistor Audio Amplifier

Thread Starter

CrashingThunder

Joined Mar 11, 2014
9
I'm designing a single channel, 6-W transistor audio amplifier for a class this semester, and I'm a bit stuck on a few things. The transistor will have four stages.

1) Input Buffer Stage (To ensure a high input impedance)
2) Gain Stage
3) Second Buffer Stage
4) Output Push-Pull Stage

Here's my current schematic in MultiSim:



Here's the oscilloscope output. Yellow is input, Blue is output.



Here's the output (in blue) taken after the gain stage, for reference.



What I'm having trouble with is clipping. So, the thought that jumps into my head is that the AC load line is causing this. Also, the output voltage should ideally be like, 20 V peak-to-peak, and it's not nearly that. Anybody an expert in audio amplifier design? I could use some pointers and advice, and it would be greatly appreciated.
 

Thread Starter

CrashingThunder

Joined Mar 11, 2014
9
What I have does amplify audio, albeit not very cleanly. The four stages I mentioned are the four stages I'll be using for the project (although not quite how they are presented in my schematic, of course). That image does pretty much nothing for my understanding of the subject.
 
I can see one obvious flaw in your design here, you have no bias what so ever on the third stage, causing it to operate more or less as a class C amplifier.

Apart from that your other stages are likely also so high gain that your input signal prbrings them to clipping, also there is no feedback.

A video of the circuit i posted above: https://www.youtube.com/watch?v=huyK3JeScVo <-- note how clean sounding it is even though the scope shows quite severe clipping.
 

donpetru

Joined Nov 14, 2008
185
An article extracted from the old magazine Tehnium, from Romania, I attached below and is an algorithm for calculating an audio amplifier. Translate article attached below and you get what you are looking for.
Do not get discouraged because and I learned a lot translating various theoretical aspects from english and russian.

Good luck.
 

Attachments

Thread Starter

CrashingThunder

Joined Mar 11, 2014
9
I can see one obvious flaw in your design here, you have no bias what so ever on the third stage, causing it to operate more or less as a class C amplifier.
Okay, this I can work with. As with the feedback -- where is it missing exactly? And I don't want to tolerate clipping. I'm being graded on certain specifications, and clipping is definitely something that I want to get rid of.
 
Donpetru, as far as i can tell, thats a romanian tranlated issue of the Elektor magazine, its a worldwide magazine, here in sweden it goes under the name "Elektronik för alla" but its the exact same thing.
 

donpetru

Joined Nov 14, 2008
185
Donpetru, as far as i can tell, thats a romanian tranlated issue of the Elektor magazine, its a worldwide magazine, here in sweden it goes under the name "Elektronik för alla" but its the exact same thing.
I think you're wrong, the article published in the journal Tehnium from Romania, in 2004, is a 100% original item made ​​by a teacher (an engineer). Isn't translated from nowhere.
If you know an article from another magazine that looks like with the attachment above, just please tell me.
 

AnalogKid

Joined Aug 1, 2013
10,989
Notice in your 2nd scope shot that the output of the gain stage (presumably after the 50 uF coupling cap) is clipping 7 volts *below* ground. This is what the secret analog society calls a clue.

Because the thrird stage has no DC bias (as pointed out above), it looks like a diode connected to ground to the output of the 2nd stage coupling cap. That base-emitter junction actually is a zener diode with a typical reverse breakdown voltage of (...wait for it...) 7 V. This stage basically is a half-wave rectifier. So while the output waveform looks like it is clipped in both directions, the lower half is rectified (ultra-clipped?), and the upper half is traditionally clipped.

So, working stage by stage, is the signal at the output of C1 what you expect? How about the collector of Q2? If Q3 is another buffer stage, why does it have a gain of 2? Is the signal clean at the junction of C5-C7-C8? Until it is, the output stage can wait. Then, does the output of the 2nd buffer have a low enough output impedance to drive the output stage? And (the biggie) can it provide enough current *in both directions*.

ak
 

Thread Starter

CrashingThunder

Joined Mar 11, 2014
9
Notice in your 2nd scope shot that the output of the gain stage (presumably after the 50 uF coupling cap) is clipping 7 volts *below* ground. This is what the secret analog society calls a clue.

Because the thrird stage has no DC bias (as pointed out above), it looks like a diode connected to ground to the output of the 2nd stage coupling cap. That base-emitter junction actually is a zener diode with a typical reverse breakdown voltage of (...wait for it...) 7 V. This stage basically is a half-wave rectifier. So while the output waveform looks like it is clipped in both directions, the lower half is rectified (ultra-clipped?), and the upper half is traditionally clipped.

So, working stage by stage, is the signal at the output of C1 what you expect? How about the collector of Q2? If Q3 is another buffer stage, why does it have a gain of 2? Is the signal clean at the junction of C5-C7-C8? Until it is, the output stage can wait. Then, does the output of the 2nd buffer have a low enough output impedance to drive the output stage? And (the biggie) can it provide enough current *in both directions*.

ak
Okay. I've got a lot to digest here, thankyou.

Is the signal at the output of C1 what I expect?

Yes. Using the oscilloscope, I get near unity gain from input to the output (taken right after C1)

The collector of Q2

This is where things go screwy. There's definitely gain, but because the gain equation depends on the load resistance (or the input resistance of the next stage in my case), it varies. The input resistance of the second buffer stage in my schematic above would be R1||R2||(r_pi + (β+1)RE) with biasing added in correct? Right now there's no R1 and R2, but if I wanted to increase the gain of the gain stage, I would need to increase the input resistance of the second buffer stage right? I've tried these things but I'm still getting screwy results

EDIT: So I think I understand the whole -7 Volts thing. I knew about Zeners and their breakdown voltage of about -7 Volts (I remember learning that at some point). Since there was no DC bias, that stage was essentially operating around 0 Volts, with the AC signal swing going below and above that point. When it got smaller than -7 Volts, it clipped because of the breakdown voltage, and clipped at the high voltage because of...the AC load line? The slope of the AC load line for that stage is too big...so...I need to make it smaller. How would I go about doing that?
 
Last edited:

AnalogKid

Joined Aug 1, 2013
10,989
Disconnect the base of Q3 and look at the Q2 collector unloaded. Is the waveform distorted? Is it the expected amplitude for no load? Is the DC operating point where expected?

Solve this stage (especially the gain), then simulate a load with various resistor values (from the coupling cap to GND) and see where it falls apart and why. Then you can adjust the input impedance of the next stage based on the loading tests.

ak
 

Thread Starter

CrashingThunder

Joined Mar 11, 2014
9
Okay, I did that, and it's still distorted, but I think I see why. I put a probe at the collector of Q2 and the DC voltage there is about 20 Volts (currently). To get the full 24 Volt swing (ideally of course), I need the voltage signal to be operating at 12 Volts -- room to go 12 Volts in each direction. To do this...I need to mess with the biasing for the GAIN stage. Okay. Thanks for pushing me in the right direction, I'll see what I can figure out.
 

Thread Starter

CrashingThunder

Joined Mar 11, 2014
9
I've tried a few things, but I'm still running into clipping problems. Here's what I've got going on now:



The yellow signal is the input signal to the gain stage.
The blue signal is the output of the gain stage. I'd like it to be at 24 V, but I'll settle for 18.7 V for now.
The purple signal is the output of the current buffer stage (the one between the gain and output stage). This is where things aren't working out. As you can see, the signal jumps from being mostly sinusoidal to just some bumps, with a voltage of only 5.07 Vpk-pk. Something is wrong here, and I feel like it has to do with the AC load line.

Any help or ideas are greatly appreciated!
 

AnalogKid

Joined Aug 1, 2013
10,989
A couple of things to think about.

When you started the design, what was your goal for the amount of gain in the gain stage?

With an input of 0.7Vp and a desire for 20 V out of the gain stage, or 10 Vp, that's an expected gain of over 140 in a single transistor.

You can't ever get a 24 V signal with a 24 V battery. There always is some voltage drop in the emitter and collector resistors.

And what about C2?

ak
 

AnalogKid

Joined Aug 1, 2013
10,989
C2 has very little to do with stability, and everything to do with gain. As an emmiter bypass it acts as a high-pass filter. It is the reason your gain stage is clipping. At 10 KHz (post #1), it's impedance is less than 1 ohm, so that stage is trying to make a gain of 4000 and an output voltage swing of 400 V. Hence, clipping.

A first pass at a redesign goes something like this:

Ignoring the dc operating point, calculate the emitter resistor you need for the gain you want.

Calculate the resistor you need for the DC operating point you want.

Subtract the two.

Your new emitter resistor is these two values in series. The small one goes to the emitter and the large one goes to ground.

The bypass capacitor connects to the resistor junction and gnd. It shorts out the large resistor at the AC frequencies of interest.

To set the low freq 3dB point for this stage, calculate the bypass capacitor for an impedance that equals the value of the large resistor.

Then model everything and adjust.

ak
 

Thread Starter

CrashingThunder

Joined Mar 11, 2014
9
Took out C2 before I saw your response. Pretty much fixed everything. Well, most everything. Now I need to work on the frequency response and get a better gain / power efficiency. Thanks for your help!
 
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