Tranisitor Biasing

Discussion in 'Homework Help' started by Reciprocalfraction, Feb 17, 2004.

  1. Reciprocalfraction

    Thread Starter New Member

    Feb 17, 2004
    1
    0
    Hello, i have a mid-term on transistors comming up and i need help. My main problem currently is understanding some basic concepts. If anyone can help me with an easy to understand explanation of what biasing a transistor circuit is, and what it means to base-bias, emitter-bias or collector-bias.

    Thanks for the help
     
  2. vector

    New Member

    Feb 17, 2004
    2
    0
    Reciprocalfraction,

    Have you checked out the chapter on this site about Bipolar Junction Transistors? There is an excellent chapter on biasing. The chapter is very well done and informative. Outside of that take a look at the bible of electronics. Just in case you don't know the bible was written by Horowitz & Hill The Art of Electronics. This is a classic book, in my opinion one of the best ever written on the subject of electronics.

    Hope this helps.
     
  3. Battousai

    Senior Member

    Nov 14, 2003
    141
    44
    There are three/four regions of operation:
    BJT: cutoff/saturation/forward active (also has a reverse active)
    FETs: cutoff/linear(triode)/saturation

    I believe that the following terminology makes the most sense: cutoff, resistive, and active.

    In the cutoff region the transistor is off and does not conduct.
    In resistive the transistor behaves like a variable resistor (FETs more than BJTs), increasing the gate voltage increases the resistance.
    Active is the region that you usually want to bias your transistor, it's also called the high gain region.

    To bias a n-channel MOSFET (nmos) in the active region the gate-source voltage (Vgs) has to be greater than the threshold voltage (Vt) to create an inversion layer in the channel of the mosfet. Also the drain-source voltage must be greater than the saturation drain-source voltage (Vdsat, Voverdrive). The current in the active region is given by the following equation:

    For Vgs > Vt and Vds > Vdsat,

    Id = k*(W/L)*(Vgs-Vt)^2

    Beware this is a very basic equation that does not model all the effects of an nmos device.

    To bias a npn BJT in the active region the base-emitter (Vbe) voltage has to be around 0.7-0.8V and the collector-emitter voltage (Vce) must be greater than the saturation collector-emitter voltage (Vce,sat). Typically Vce,sat is around 0.1-0.2V. The collector current of a BJT is an exponential function of the base-emitter voltage (where the nmos drain current has a squared dependence on the gate-source voltage "square law"). Specifically the collector current of a BJT is given by:

    Ic = Is*exp(Vbe/VT), where VT=26mV at room temperature and Is ~ 10^-16 A.

    If you graph this function you'll find that around 0.7-0.8V the collector current is outputting a good amount of current.

    Your question is a VERY BROAD one. I hope I covered some of the basics (101 style) here. If you have any questions or I've made any mistakes, post back here.
     
  4. Dave

    Retired Moderator

    Nov 17, 2003
    6,960
    143
    I think Battousai has cover pretty musch everything you want to do with biasing. I know when looking at biasing it can be an awkward concept to start with, particularly in BJT because biasing is in essence a voltage governed characteristic, whereas BJT are current controlled devices. I know this caused some confusion first time around.

    Just to add to what vector was saying, yes there is some very good information in this site if you put "transistor biasing" into the search engine. It covers biasing in BJTs, and the different forms of FETs. Also the book vector mentions "The Art of electronics" is a classic and I know was very popular amoungst students at my university mainly because it dealt with the theories and concepts of electronics without swamping you full of Mathematics; which brought terror into the hearts of many a student!
     
Loading...