I have a schematic circuit of the Infineon TLE7274D LDO chip that came from a reverse engineering process. It can be viewed by Cadence. I need to simulate it and make the output as close to the target (5V regulated) as possible. When I simulate it using the test-setup presented in the datasheet ( http://www.alldatasheet.com/datasheet-pdf/pdf/153286/INFINEON/TLE7274D.html ), it doesn't work and it ouputs only about 1.5V. I don't know what's the problem since I'm not a good circuit analyzer. Please help me

I can send you the files needed to be viewed in Cadence for this matter.

Thanks.

 

Post a screen shot of your circuit.
Not many people here have Cadence. I don't.

You should always use the manufacturer's latest datasheet for the product.
Here is a link: http://www.infineon.com/dgdl/tle727...90004&fileId=db3a304412b407950112b436c18e66c4

 

Hmm, the circuit contains many blocks and those blocks contain other blocks. So there are many levels in the circuit. A screenshot will be useless I guess

 

What's your input voltage, and what's your output load?

You need at least 6v in, and your output load needs to be <= 300mA. You also need to follow the recommendations for the filter/bypass caps. Some of these LDO regulators are mighty particular about the size and type of caps.