# Timer Problem

Discussion in 'The Projects Forum' started by McGuire406, May 3, 2014.

1. ### McGuire406 Thread Starter New Member

Apr 28, 2014
10
2
Hello, everyone! I'm a first-time poster who's having a little trouble with a project that I'm working on.

To give some background, I'm studying electronics at a two-year technical school. I'm at the end of my first year, and we're currently discussing digital circuits and the like.

What I had to do was set up a counter with a 74192, 7447, and 7-segment display. I managed to get the basic function of the circuit to work. I can get it yo count up 0-9 and down 9-0. My instructor wants me to set it up so it'll count down from 5-9. So, the counting sequence will look like this: 5, 4, 3, 2, 1, 0, 9, 5, 4, 3, and so on...

What I did to work on it, I decided to tie in the binary output for five (LEDs A and C) into a NAND gate; this output than went into the Parallel Load (pin 11) of the 74192. The other thing that I did was to tie LED D (representing binary for 8) into one of the input pins. No matter what input pin (1, 9, 10, 15), I just get a static number. I also thought putting into the master reset would fix it, but that didn't work, either.

I worked on it for 3 or 4 hours Thursday with no solution. I was wondering if I could receive some guidance as to what I'm doing wrong, and sorry if I come of as lazy or demanding help. Thanks, everyone!

(I also attached two pictures so you'll have a reference. Excuse my handwriting.)

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2. ### ericgibbs AAC Fanatic!

Jan 29, 2010
2,604
396
hi,
Detect the down count of '8' use the NOT of this to the /PL pin.

The Parallel Input pins should be hardwired wired for Load '5' ie: 0101

Action: when count '8' is detected it Parallel loads '5' into the counter

3. ### AnalogKid Distinguished Member

Aug 1, 2013
4,708
1,301
Two quick thoughts.

1. 5 is what you want to load into the counter, not the state that triggers the load. Counting down and skipping from 9 to 5 means decoding an 8 and using that to load a 5. This works because the 192 has asynchronous load and clear. The counter down counts from 9 to 8, the 8 is detected and forces a load of 5 instantly, not waiting for the next clock. The 8 appears briefly at the output and on the numeric display, but for way less than a microsecond.

2. In 1602, Leonardo Bigollo wrote a book, and part of the book was about nothing. Why does this matter? No, ak hasn't finally gone off the rails. Leo's other name was Fibonacci, and it was the most important book in the history of mathematics because it introduced to the west the hindu-arabic numeral system, including the concept of zero. Roman numerals ruled mathematics for over 1000 years; Fibo and his zero replaced them in 50.

You are correct that 1 + 4 = 5, but there is more to decoding a 5 than and-ing only the relevant ones. Your 5 decoder also will be true when the counter reaches 7, and in a down-counter 7 comes up before 5. You can get away with decoding only the ones to pick off a number (I've recommended it here in other threads), but only if you're sure that that number is the first instance of that combinations of ones. If you're not sure, decode the zeros.

ak

4. ### Bernard AAC Fanatic!

Aug 7, 2008
4,244
423
It seems that if we load on 8, the 9 will not appear, so maybe load on not 1 & 8 via 2 in NAND. Maybe use 3 input NAND and add clock so that load is gone before next clock.

Last edited: May 3, 2014
5. ### AnalogKid Distinguished Member

Aug 1, 2013
4,708
1,301
Loading on 8 will work as long as the 8 is fully decoded: NOR 1, 2, and 4, and AND that with 8. The problem is that the 192 has an async load, so meta-conditions might trigger a load during the transition from 0 to 9.

ak

6. ### Bernard AAC Fanatic!

Aug 7, 2008
4,244
423
Did you mean NAND with 8 and NOR ?

7. ### ericgibbs AAC Fanatic!

Jan 29, 2010
2,604
396
hi,

All that is required is to INVERT the '1' output and NAND it with the '8' output this will give a /PLoad , the parallel inputs being hardwired for a '5'

0,9,5,4,3,2,1,0,9,5............

E

Bernard likes this.
8. ### McGuire406 Thread Starter New Member

Apr 28, 2014
10
2
Sorry that I haven't gotten back to this, yet. I had work yesterday and was busy this morning.

So, let me get this straight, I'll need to have NOT 1 NANDed with 8, and that'll go into the PLoad? I'll also need to plug in 5 into the PLoad, correct?

Also, what is hardwiring? Sorry for all of the nooby questions, I'm just trying to comprehend all of this. THanks, guys!

9. ### ericgibbs AAC Fanatic!

Jan 29, 2010
2,604
396

hi,
Hard wired means permanently connected to either +5V or 0V,,,,Hi or Lo.

If you have a problem I could post a circuit.
E

10. ### ericgibbs AAC Fanatic!

Jan 29, 2010
2,604
396
hi,
I have run a LTSpice simulation for you to show its operation.

E

• ###### AAesp01.gif
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11. ### McGuire406 Thread Starter New Member

Apr 28, 2014
10
2
Ok, thanks! I didn't know that "hard wired" was the term to connecting something to a state of either High or Low.

I'm kind of understanding how you have it set up in the circuit diagram. I'll have to test it tomorrow when I'm in the lab at school. I'll post my results when I get it set up. Thanks, Eric!

12. ### McGuire406 Thread Starter New Member

Apr 28, 2014
10
2
Just wondering, how exactly would I hardwire Load 5 into the Parallel Input pins? Would I take the outputs for 5 (LED A and LED C) and plug them both into the same pin (I assume you mean 1, 9, 10, 15 on the 74102)? Or would I tie in binary '4' and binary '1' into a NAND?

13. ### ericgibbs AAC Fanatic!

Jan 29, 2010
2,604
396
hi,
Look at this sketch of the 192, solder wires to the IC connector pins to the points marked on the sketch, ie: +5V or 0V as shown.
This will give a hardwired BCD '5' on the Parallel input pins
E

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14. ### McGuire406 Thread Starter New Member

Apr 28, 2014
10
2
Ok, thanks! I finally got it to work. I was way overthinking the entire thing, and it actually worked out quite nicely.

15. ### Bernard AAC Fanatic!

Aug 7, 2008
4,244
423
Try this out. Only one, 3 X 3 input NAND chip is needed One section of 74HC10 is used to invert A, " 1 ", 3 rd not used & inputs grounded. Without including CLK in the NAND, LOAD may overlap CLK, possibly giving another 5 instead of a 4 ?? Note that timing chart is accurate only up to load, shown as if there were no load present.

• ###### Down Count 00000.jpg
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Last edited: May 5, 2014