Calling on the kindness of transistor experts, as this one has me stumped. I’ve got a transistor output power amp with an op-amp for the error amplifier, in a circuit remarkably similar to the one on pages 6 and 7 of LT App Note AN18 (5.6 MB).

My problem is that with the HT supply rails at ±50 V, the output transistors keep frying themselves due to thermal runaway. It’s much more behaved at ±45 V, and occasionally a pair of transistors will survive at ±50 V, so it looks like it’s marginal. The transistors are little SOT-23 devices ( FMMT458 (130 KB) and FMMT558 (121 KB)) and the bias circuit diodes are 1N4148WT (131 KB). These diodes are so tiny it’s possible to put three of the things side by side on top of a SOT-23 package. On the prototype, each diode is soldered directly to the leg of the relevant transistor, so the thermal coupling is about as good as it gets.

The emitter resistors are 10 Ω, the circuit has been blowing up with an open-circuit load, and there are no traces of instability. Normally the circuit drives a 6 H inductive load via a 100 Ω series resistor, and it will quite happily do this all day with slightly lower HT rails. The no-signal no-load quiescent currents through the output transistors are (initially) tiny, measured at about 4 μA.

I can make the problem go away (higher ambient temperature tests pending) by only using one bias diode, but with larger sized output transistors a two-diode bias should be erring on the side of caution. Is there something subtle going on because of the small sized (and hence quick-to-warm-up) transistors, where I may have reached a limit on the bias levels? I know some small modern MOSFETs can have a critical current density threshold where they are prone to thermal runaway and secondary breakdown if they are operated below this threshold (the current density tempco flips at this crucial point), but I’ve never heard the like with bipolar devices.

So… does anyone know what’s going on here? Any ideas on the subject will be much appreciated. I’m not looking for a fix (it’s easily fettled), just an understanding.

 

it looks like it’s marginal. The transistors are little SOT-23 devices ( FMMT458 (130 KB) and FMMT558 (121 KB)) and the bias circuit diodes are 1N4148WT (131 KB). .

SOT-23 devices are not intended for power amplifier service. The thermal resistance of the packages is too high. The practical limit of power dissipation is about 0.5W.

The devices burn power based upon the voltage drop times the idling current. You are killing them by raising the voltage so one of two things is happening:

1) power dissipation is cooking them

2) voltage is exceeding their safe operating area and killing them with punch through failure. According to the data sheet, they are 400V devices so this is less likely.

Did you measure the actual idling current (by the drop across the emitter resistor)? That will tell you what's killing them

 

Thank-you bountyhunter, I appreciate your kind answer. You're quite right, SOT-23 devices aren't the ideal devices for a power amp output stage, but they're what I've got to work with. They're operating well within the SOAR limits - the working current is 4.5 mA, and the output is actively current limited to 30 mA. The quiescent current (as measured across the emitter resistors with the output at 0V) is a weeny 4 μA.

This circuit is for an industrial application, and replaces a circuit (not my design) that used the same transistors, at the same working current and same supply voltage, and this has been in use for a while with no thermal runaway problems. However, the original circuit was marginally stable and had nasty crossover distortion, and this was limiting performance in a signal chain elsewhere.

I'd do the thermal resistance calculations but alas the datasheets aren't forthcoming with this information. They also give the collector-base breakdown voltage* as 5 pF for both devices (surely that should be -5 pF for the PNP? ).

A previous iteration of my circuit used an amplified diode to set the output bias, and when set to 1.0 V I had no problems, it's just when I simplified it a bit by using 2 diodes (giving 1.2 V) that things started frying. What I shall do then is drop the bias voltage to 0.6 V and then validate the hell out of it. I may raise the value of the emitter resistors a tad, that should help.

* That should ideally read "collector base junction capacitance".

 

The app note schematic does state to use heat sinks on the output transistors.

How much copper is on the PCB around the transistors to assist in dissipating heat?

 

Thanks Thatoneguy. There is no copper at all near these output transistors on the prototype board. There was no time to produce a prototype PCB, so it's been rustled up by superglueing SMT components to the component side of a bit of single-sided FR4 and joining them all up with 0.315 mm enamelled copper wire. Whenever a 0V connection is needed a small hole is drilled to the ground plane beneath. This makes for circuits that are physically delicate, but have excellent noise and speed characteristics. That said, I much prefer prototypes on nice PCBs.

The intention has always been to mount the bias diodes in close thermal contact to the transistors, and on the prototype I had each diode soldered directly to it's adjacent transistor, which is about as good a thermal contact as is possible with these devices. On the production PCB, assembly constraints would mean that this thermal connection wouldn't be as good, so I would have to provide a thermal path with PCB copper, plus possibly another bit of copper (electrically connected but thermally isolated a bit by necking the track) as a small heatsink, as you suggest. But given what I've observed of the speed of the secondary breakdown, the probability is that by the time any excess heat reaches the ouside of the SOT-23 package, the silicon inside would have already fused. I'll design in a bit of a heatsink pad though, it's a good suggestion.

In normal operation (at sub-thermal runaway bias levels) the transistors dissipate 113 mW, just under one-quarter their rated power, and they don't even get lukewarm. But once they pop the heat spike is enough to desolder their own legs.

 

I'm assuming that you are not using the same resistor values as those shown in the app note. Can you post the schematic you are actually using?

 

Thank-you bountyhunter, I appreciate your kind answer. You're quite right, SOT-23 devices aren't the ideal devices for a power amp output stage, but they're what I've got to work with. They're operating well within the SOAR limits - the working current is 4.5 mA, and the output is actively current limited to 30 mA. The quiescent current (as measured across the emitter resistors with the output at 0V) is a weeny 4 μA.

Then the circuit is not working correctly. That is simply leakage current which means the transitors are OFF. The point of having the diode chain mirroring the transistor output stage is to be able to force a stable (and known) idling current through the output transistors so the are running class AB. In other words, biased very slightly on to eliminate crossover distortion. If the bias setting is wrong, then it probably does not control the bias current when the transistors get hot which is why they fail from thermal runaway.

Attached is an example of a temp compensated output stage with adjustable bias current.

 

In normal operation (at sub-thermal runaway bias levels) the transistors dissipate 113 mW, just under one-quarter their rated power, and they don't even get lukewarm. But once they pop the heat spike is enough to desolder their own legs.

That sounds odd. I wonder if the failure mode is punch through. What is the load that they drive?

 

I'd do the thermal resistance calculations but alas the datasheets aren't forthcoming with this information.

If that is a typical sot-23, the ballpark would be about 150 - 200C/W junction to ambient. Adding copper does virtually nothing to reduce it unless the package has a "heat slug" under the die to conduct heat straight down to the board (the standard sot-23 does not have this).

 

Since it is currently a prototype, can you swap out the SMT for a TO-220 packaged transistor to notice any changes?

 

Please post the schematic. There may be something else going on besides thermal from idling current.

 

Thanks again guys. Bountyhunter and Ron H, I'm really sorry, I can't post the schematic, it's company confidential and I would be in breach of my contract if I did so. You can assume it's the same architecture as the Linear Tech circuit I linked to earlier, except I've got a 10 μF cap across the biasing diodes. But for your amusement, I can post a pic of the prototype board:

This is an earlier version with SO-35 1N4148s - these were quickly replaced with the teeny SMT versions soldered directly to the output transistors.

That sounds odd. I wonder if the failure mode is punch through. What is the load that they drive?

2-diode-drop-biased transistors are blowing with an open-circuit load, but the application load is 100 Ω in series with 6-8 H. I've a "golden pair" of transistors (read low hFE or slightly damaged) on the output of my unit, and they can be biased at 2 diode drops without trouble. I shall look into the punchthrough phenomenon, as it's not something I'm very familiar with.

In answer to thatoneguy, I reckon TO220 transistors would work a treat, if there's enough drive current available. I can't use them in the final design (I'm restricted as to my choice of components), though they'd be useful for troubleshooting.

I think the only thing I can do is wait a couple of weeks until some nice PCBs turn up, and then I can do a few destructive experiments and take some measurements of the transistors in their death throes. I'm loathe to do this at the moment as it's such a pain to change the transistors on the prototype board. Thanks to everyone for their advice, I'll be sure to post my findings in a couple of weeks or so.

 

2) voltage is exceeding their safe operating area and killing them with punch through failure. [/QUOTE]

Ding Ding Ding Ding Ding! And we have the smoking gun!


Eric

 

Smoking transistors at least, KL7AJ. The SOAR looks marginal at DC, but with the drive signal (square wave, AC coupled, τ = 8 ms) there's plenty of margin. These devices have a rated Vceo of 400 V, so I should be able to drive a ±22 V waveform at ±4.5 mA with ±50 V rails. I reckon. I can see a perfect output waveform for a second or two, before the wisp of smoke... Anyhoo, I promise to post the results of the more vicious tests to come.