Synchronizing two different frequencies

Discussion in 'General Electronics Chat' started by electronice123, Jan 29, 2016.

  1. electronice123

    Thread Starter Senior Member

    Oct 10, 2008
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    I've got a project I don't know how to go about. I have two signal generators (A1 and A2). Each will output a different frequency and each frequency is adjustable. One frequency (A2) will always have a longer pulse length than the other. I need the longer frequency to gate the shorter one but in a way that does not change the pulse length of any of the shorter pulses. I also need this to happen no matter how much I change the frequencies. I have attached a picture showing what I am trying to do. You can see that the OUT pulses all have the same pulse length even when the other pulses A1 and A2 might cut them short if I used logic gates.


    Initially I thought an 4071 OR gate would work, but once I simulated it in multisim some of the leading pulses were cut short and some of the trailing pulses were cut short.


    How can I get the result I am looking for?
     
  2. wayneh

    Expert

    Sep 9, 2010
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    Without reverting to the documentation, I think a 555 will continue its pulse even after it is disabled. So I think you will always get full pulses at both ends.
     
  3. electronice123

    Thread Starter Senior Member

    Oct 10, 2008
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    Yes but I already have a dual channel signal generator that has much more functionality than a 555. I just need to be able to sync the two frequencies together as I showed in the drawing.....Maybe a flip flop, only thing is I haven't worked with flip flops before so I don't know how to do it.
     
  4. wayneh

    Expert

    Sep 9, 2010
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    Yes but I was thinking you might use the 555 in monostable mode to process each pulse signal from the generator. I was just thinking out loud. I admit I can't see how you'd easily set it up for more than one frequency.

    Here's another wild guess - take a look at PLL. Your frequencies differ by an integer factor, and I suspect you could use that. Divide the fast one down to match the slow one, then use PLL to put them in synch. Again, wild ass guess.
     
  5. chuckey

    Well-Known Member

    Jun 4, 2007
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    If you only want whole output pulse then F1 must always be an exact multiple of F2. Or you need some complicated arrangement where by, if the F1 pulse has started, it always finishes even if F2 has gone.
    Frank
     
  6. Lestraveled

    Well-Known Member

    May 19, 2014
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    @electronice123
    This is very doable. I designed something like this about 10 years ago. Yes you will need to use a flip flop or two.
    First a question, in your example picture, the last A1 pulse goes high after A2 goes low (outside of the gate A2). Is this an error in your example or do you want a finite number of A1 pulses to be passed?
     
  7. electronice123

    Thread Starter Senior Member

    Oct 10, 2008
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    Just an error in my example....I don't need to have a certain number of pulses, I just need to make sure that each pulse has the same pulse length, that none are cut short or extended.
     
    Last edited: Jan 29, 2016
  8. Lestraveled

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    May 19, 2014
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    @electronice123
    I am not going to do this for you, but I will help you through this.
    First you need to organize your design. Get some graph paper. Along the top draw your input signals, along the bottom draw what you want your output to look like. Label your signals on the left. Draw four groups of pulses that cover the four start stop conditions (like in you picture, there are four start stop combination, not three). Sometimes it works if you start at the output and work backwards. Do the easy stuff first, such as, what is the logic condition that you start an output with, that works with all four conditions. Break your design down into functional blocks.

    I really enjoy doing this kind of logic design. Relax and think of it as solving a puzzle.
     
    Last edited: Jan 29, 2016
  9. electronice123

    Thread Starter Senior Member

    Oct 10, 2008
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    Cool, I'll start working on it and post more later when I have got the conditions mapped out. Thanks for the help so far, I knew there was a way it could be done.
     
  10. jpanhalt

    AAC Fanatic!

    Jan 18, 2008
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    Isn't that just an AND gate?
    https://en.wikipedia.org/wiki/AND_gate

    The only time the output is high is when both signals are high. My poor eyes did not see any edge dependence in the drawing.

    FORGET THAT: I just re-read Post #7 ; however, I don't see how that condition (no pulses or spaces between pulses are longer or shorter) can be met if both frequencies are adjustable and there is no defined relationship between the two.

    John
     
    Last edited: Jan 29, 2016
  11. Dodgydave

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    Jun 22, 2012
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  12. crutschow

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    Mar 14, 2008
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    That won't work.
    Since the two pulses have no relationship to each other you need something more than just simple gating to avoid truncated pulses that the OP is concerned about.
    Likely requires a FF with additional gating as Lestraveled mentioned.
     
  13. dannyf

    Well-Known Member

    Sep 13, 2015
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    Let's say you have two pulse train, one 10hz and another 11hz.

    How would you synchronize them?

    If you can figure out a way to do it manually, you can figure out a way to do with electronics.
     
  14. Lestraveled

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    May 19, 2014
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    Here is a hint.
    You will put your A1 signal to one input of a AND gate. The other input will be a gate that is synchronous to A1 yet is triggered by a combination of A1 and A2. The goal is to generate that gate that will turn A1 on and off at the right time. What is the logic condition that you would start this gate and what logic condition would you stop it.
     
    Last edited: Jan 29, 2016
  15. jpanhalt

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    I agree, hence the correction to my post. However, when the OP said the frequencies could be adjusted, I interpreted that to mean that an "adjusted" frequency did not vary from that adjustment. If that is true, then the problem is over-constrained.

    John
     
  16. crutschow

    Expert

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    I don't see how that affects the problem. :confused:
    Whether the frequency varies or not after adjustment doesn't affect the problem of gating one signal from another that are not synchronized to each other.
     
  17. AnalogKid

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    Aug 1, 2013
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    Les has the solution; he beat me to it because my day job flared up. It turns out that 100 mV 10 GHz square waves are kinda a bitch to measure. Who knew?

    Recreating the A1 pulse train with a 555 will work, but it is overly complex and introduces unnecessary sources of timing error. A solution based only on logic devices can track the inputs over very wide frequency and pulse width ranges. It needs two flipflops and a couple of gates. One ff synchronized the beginning of the output burst, and the other ff synchronizes the end.

    ak
     
  18. jpanhalt

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    @crutschow
    It is all in how you interpret the term, adjustable. When I "adjust" something, that is where is stays. It doesn't vary. If the "mark" is kept constant, but the "space" varies, then the frequency changes, if only for that one cycle out of n cycles. Nothing has been said about duty cycle, but as I understand the constraints, if the duty cycle is >=50%, and there are not contraints on the ratios of the two signals, then there is a chance that the two "marks" will be contiguous, and so forth.

    John
     
  19. Lestraveled

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    This is a perfect circuit for someone to learn logic design, or at least the beginnings of how to design with logic.

    What are some of the ways you would approach solving this puzzle? This is a teaching forum, lets teach.
     
  20. jpanhalt

    AAC Fanatic!

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    Let's get the question clearly asked first. I have seen umpteen impossible question lead to long, tortuous threads, and in the end, it was simple once the OP said what he really wanted to do.

    John
     
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