Switch mode P.S noise ripple

Discussion in 'General Electronics Chat' started by Baron, Aug 31, 2010.

  1. Baron

    Thread Starter Active Member

    Jun 15, 2009
    Hi all,
    How do I know what the required noise ripple for my circuit is? I have mixed analog/digital circuits with MCU and external memories and etc.. But I can't find in any component datasheet specification about the required VCC noise ripple.
    What's my goal of my switch mode regulator to achive ? the RMS noise? the max Peak to Peak noise? The avarage?

  2. timrobbins

    Active Member

    Aug 29, 2009
    A requirement stems from an understanding of the total operation of the system and its parts. You indicate you have a mixed analog/digital system.

    You could start with digital by defining the worst-case voltage levels of all the digital signal state transitions - that's both outputs and inputs. Eg. a DO may have worst-case 0.5V LO, and the input it feeds may have 1.5V LO sense level - so you have 1.0V headroom. Uncorrelated noise on each end of 0.5Vpk could cause a logic disturbance.

    Analog probably has more quirks as to what may be bad.

    ADC and DAC is similar to digital, but likely the area that is most influenced by supply noise.

    Some requirements are generated after a circuit is prepared. Disturbing signals are fed into the supply system, and the disturbance level that generates a measured inaccuracy (ie. a data output that changes value) is then the upper limit on the supply noise/frequency spec.

    The impact of pk and rms comes down to the different influences on system circuit operation that may occur. Some DI's may respond to any type of pk, no matter how short. Some DI's may have embedded software filtering so that they only respond to long periods of a sustained level. Analog RCs move requirements more to average levels.

    Ciao, Tim