Suggest a graphical procedure to find the Q-point

Discussion in 'Homework Help' started by ajinkyakulkarni87, Oct 28, 2005.

  1. ajinkyakulkarni87

    Thread Starter New Member

    Oct 26, 2005
    3
    0
    Where I can find the articals related to following title?
    Please tell me the answer of this question or tell me the website to
    get the answer related to following.....


    "Suggest a graphical procedure to establish the Q-point for JFET as a
    amplifier with voltage divider bias( 6 Marks)"



    I am an Engineering Student(Computer Sci.) and this above mentioned question is asked in the university examination in the subject Electronic Devices and
    Circuits(EDC) and I searched a lot for the particular answer , so that
    I can write the answer in the examination. However, I failed to get the
    answer in examination point of view.


    If you know any e-book or any website, that explains this answer and
    some other websites for EDC then please tell me.


    Thank you

    Ajinkya Kulkarni
     
  2. glx1747

    New Member

    Nov 16, 2005
    3
    0
    I do believe you are talking about the "load line"
     
  3. hgmjr

    Moderator

    Jan 28, 2005
    9,030
    214
    Hi ajinkyakulkarni87,

    I agree with glx1747 that the graphical procedure being referred to in the problem statement is the Loadline Method.

    This link (Click here: Loadline Method) takes you to an article decribing the technique as applied to a common-source MOSFET amplifier stage.

    This technique is very useful in determining the operating point (Q-point) as well as several other useful operating parameters of a number of different devices. I have applied it to diodes, transistors, and MOSFETs.

    hgmjr
     
  4. ajinkyakulkarni87

    Thread Starter New Member

    Oct 26, 2005
    3
    0

    The problem is related with Load Line Concept only
    Thank you for the help






    Ajinkya Kulkarni
     
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