stpic6c595 clock issue

Thread Starter

Shehwar Hussain

Joined Oct 26, 2014
21
Hi all,

I am facing a clock disturbance issue. I have 10 PCBs all connected in a cascaded style. Each PCB have 2 sptic6c595 used to drive seven segment displays. All the shift registers are driven by a single mcu. The displays on very last PCB gets disturbed after some time. The disturbance is due to clock line(SRCK) because if i touch the clock line (with something non conductive) on any PCB, the display starts to behave well. The clock line is quite long and shared among all shift registers. I also found that if the clock line is touched on all PCBs to the points where they are soldered, the last display starts working fine otherwise display gets corrupted (Segments half turned on). I am stuck at this point and i am pretty sure nothing else is disturbing these segments because the soldering, wires and mcu firmware has been double checked. Any help related to this clock issue would be appreciated. I have also attached the PCB schematic. The problematic line is black-arrowed. Blue line shows the track on PCB and Yellow line depicts that it is a jumper.
 

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joeyd999

Joined Jun 6, 2011
5,237
Hanging a very small cap on the output of your clock should slow the rise and fall times enough to solve the problem. But ideally, you'd be better off solving the reflection issue you are seeing.
 

joeyd999

Joined Jun 6, 2011
5,237
@joeyd999
You mean 0.1uF from clock line to GND...?? Can you explain a bit more why i am seeing this problem?
No. More like 20 to 50 pF. Start small and go larger as necessary. Too much C will result in excessive current flow, depending on clock frequency, and may also completely inhibit clocking.

You said it was a long line. The clock edges are getting reflected back from the end of the line causing the erroneous behavior.

When you touch the line, you add a little bit of capacitance that slows down the edges, correcting the problem. My suggestion simply replaces your finger with a cap. It should work.
 

joeyd999

Joined Jun 6, 2011
5,237
oh...and I just saw your post indicating clock frequency is 20 Mhz.

The cap needs to be on the really small side, probably less than 20 pf -- but I'm not sure now if the cap is going to be a reliable fix.

You really need to look at this clock line as a transmission line. And terminate it appropriately.
 

Thread Starter

Shehwar Hussain

Joined Oct 26, 2014
21
@joeyd999
I added 22 pF (one leg on clock line and the other on GND) and the whole circuit went down(all displays off). :(

And you mentioned that the clock lines should be terminated properly. How should i do that?
 

atferrari

Joined Jan 6, 2004
4,764
What is the actual distance between the micro generating the clock and the problematic last PCB?

How do you connect each PCB to the next? Any picture that you could show?
 

joeyd999

Joined Jun 6, 2011
5,237
@joeyd999
I added 22 pF (one leg on clock line and the other on GND) and the whole circuit went down(all displays off). :(

And you mentioned that the clock lines should be terminated properly. How should i do that?
Like I said, I think 22 pf is too large. You can try putting 2 or 3 in series to see if that helps.

Otherwise, you have two options. Compute the line impedance (I can't help you there) and hang an equivalent R to ground on the last board.

Or, add clock buffer on either the input or output of each board.
 
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