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SR Latches

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I was reading the post about sr latches and how they worked. It was spot- on however I realized that a lingering question I had about their operation was not entirely answered. The truth table stated that when both the set and reset signal were 0, the output was a latch operation. It would be nice to explain how this state is reached. It took me a while to realize that this was a transition state from one of the inputs (i.e. when S changes from 0 to 1 or vice versa and the other input remains constant).
 
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