SR flip-flop

Ron H

Joined Apr 14, 2005
7,063
Ok, but would the SR even work with it being sourced instead of sinked?
It might not. When you source a lot of current from a TTL gate, the logic "1" (Voh) level drops, possibly so low that it will not properly drive the input of the other gate (inverter, in this case). The 74LS series only guarantees valid Voh for source current<400uA.
Do you want or need to drive a grounded LED, or are you just curious?
 

Thread Starter

GTeclips

Joined Feb 18, 2012
96
Like in Chips diagram on page 2, If you have neither of the switches high, then how does the current get to negative to power the leds, because wouldn't that be an open circuit?
 

Ron H

Joined Apr 14, 2005
7,063
Like in Chips diagram on page 2, If you have neither of the switches high, then how does the current get to negative to power the leds, because wouldn't that be an open circuit?
Isn't that the circuit you built? Does it latch when you have both switches released (open)? Do you have +5V on pin 14, and ground (the negative side of your supply) to pin 7?
The LED current flows through the output of one of the inverters to ground.
The purpose of the inverters is to latch the present state and drive one or the other LED. The switches are intended to be momentary, for changing the state of the latch (FF).
 

MrChips

Joined Oct 2, 2009
30,824
Hah! I see what is confusing you.


In the circuit diagram above, it appears that the circuit is floating up on the +5V side when both switches are released.

It is customary in digital logic not at show the VCC/GND or VDD/VSS connections.
As Ron pointed out, the gates are still connected to +5 (VCC) and GND. Hence there are paths to GND that you do not see in the diagram.

One of the two inverters is in "sink" mode. That is, it is sinking current to GND.
The other is in "source" mode but no current flows since it cannot source current into the +5V supply.
 

Ron H

Joined Apr 14, 2005
7,063
Hah! I see what is confusing you.


In the circuit diagram above, it appears that the circuit is floating up on the +5V side when both switches are released.

It is customary in digital logic not at show the VCC/GND or VDD/VSS connections.
As Ron pointed out, the gates are still connected to +5 (VCC) and GND. Hence there are paths to GND that you do not see in the diagram.
But he said it works. Maybe that was only when a switch was pressed.
 

Thread Starter

GTeclips

Joined Feb 18, 2012
96
I actually did mean what chip said, but I understand it now, sort of. Just have 2 questions.

So, typically CMOS uses sourcing, and TTL uses sinking?

If I wanted to make a flip-flop like the one just demonstrated, but instead of leds, a digital display with one common cathode, how would that work?
 
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