# Solar Cell IV charecterization by charging a capacitor

Discussion in 'The Projects Forum' started by abhaymv, Dec 14, 2013.

1. ### abhaymv Thread Starter Active Member

Aug 6, 2011
104
4
Hello,
I’m designing a circuit to measure the IV characteristics of an illuminated solar cell. The idea is to charge a capacitor with the solar cell. The capacitor acts as a variable load. A current sensor measures the current flowing to the capacitor and the voltage across the capacitor is measured by a voltage sensor. The values of the current and voltage sensors during the time the capacitor is being charged directly corresponds to the required set of values for IV characteristics. This method is used to characterize large PV modules. I’m hoping to use the same technique to measure the IV characteristics of a single solar cell.
I’ve incorporated a switching arrangement in the design so that the capacitor may be charged and discharged at times controlled by the user. An MCU uses PWM to control two MOS switches. The first switch charges the capacitor from 0 V to the open circuit voltage of the solar cell. The next switch is used to discharge the capacitor through a resistor so that it can be used for another measurement.
I’ve created a circuit based on this idea and simulated it using LTSpice IV. I’m using an inverter between the two switches so that the switching takes place in an alternating fashion. Because 7404 inverter output is between 0 and 1 V, I’ve used a non-inverting amplifier to change this to 0 and 5V, so that MOSFET switching action takes place. The default ltspice NMOS was used.
However, the simulation yields unexpected results. I’ve used the simple equivalent circuit consisting of a current source, diode and series and shunt resistances to model the solar cell. However, the simulation shows that the capacitor charges and discharges between two fixed DC levels. That is, the capacitor does not discharge completely to zero. In fact, the capacitor voltage doesn’t even start from 0V at t = 0s.
After some experiments, I’ve found that the level to which the capacitor voltage drops during discharge is dependent on the diode model I’ve chosen. So I decided to model a diode which would approximate the solar cell diode. As far as I could see, the diode saturation current and ideality factor (or emission coefficient N) are the only parameters that would affect the diode forward characteristics. So I chose the following values:
Assuming an open circuit voltage of 0.8V and a short circuit current of 0.5A, I determined the value of reverse saturation current as
I0 = 7.27fA.
[This is found by the relation Iph = I0*(exp(qVoc/(nkT))-1) and Iph approx. equals Isc; Here T = 300K]
I chose an emission coefficient N =1. I don’t know what the value will be, but N is ideally 1 from what I understand.
With this I used the following model:
.model solar_diode D (IS=7.27f RS=42.0m BV=50.0 IBV=5.00u + CJO=39.8p M=0.333 N=1.45 TT=4.32u)
The other values of the model file were substituted from a 1N4001 model file. I don’t know if they are fully suited for a solar cell.
When I simulated the circuit, the capacitor voltage was varying between 574 mV and 594mV.
For IV characteristic measurement, I need the capacitor to charge between 0V and 0.8V (Voc). The values I get by simulation don’t make much sense to me.
Why isn’t the capacitor fully charging? Why isn’t it fully discharging?
Why doesn’t the capacitor start at 0V when t = 0? (The time at which ltspice starts saving data is 0s).
I tried varying the capacitance, the resistance R1, and the gate voltage of the MOSFET switch. None of this brought the desired results. What I conclude is that I’ve made some errors while modelling the diode.
Can someone help me by pointing out where I went wrong? Is this method not suitable to measure the IV characteristic?
SPICE NETLIST:
Code ( (Unknown Language)):
1.
2. [SIZE=2]* F:\Engg\Sun\IVtrace Simulation\ivckt.asc[/SIZE]
3. [SIZE=2]C1 N008 0 3µF[/SIZE]
4. [SIZE=2]M1 N008 N004 N007 N007 NMOS[/SIZE]
5. [SIZE=2]M2 N009 N001 N008 N008 NMOS[/SIZE]
6. [SIZE=2]R1 N009 0 10[/SIZE]
7. [SIZE=2]A1 N004 0 0 0 0 N003 0 0 BUF[/SIZE]
8. [SIZE=2]V1 N004 0 PULSE(0 5 0s 50us 50us 5ms 10ms 100) Rser=0[/SIZE]
9. [SIZE=2]XU1 N003 N002 +15 -15 N001 LT1001[/SIZE]
10. [SIZE=2]V3 +15 0 15V[/SIZE]
11. [SIZE=2]R2 0 N002 1k[/SIZE]
12. [SIZE=2]R3 N002 N001 4k[/SIZE]
13. [SIZE=2]Isrc1 0 N005 0.2A[/SIZE]
14. [SIZE=2]Rp1 N005 0 100k[/SIZE]
15. [SIZE=2]Rs1 N006 N005 1[/SIZE]
16. [SIZE=2]V2 0 -15 15V[/SIZE]
17. [SIZE=2]R§Sense_Resistor N006 N007 0.1[/SIZE]
18. [SIZE=2]D1 N005 0 solar_diode[/SIZE]
19. [SIZE=2].model D D[/SIZE]
20. [SIZE=2].lib C:\Program Files (x86)\LTC\LTspiceIV\lib\cmp\standard.dio[/SIZE]
21. [SIZE=2].model NMOS NMOS[/SIZE]
22. [SIZE=2].model PMOS PMOS[/SIZE]
23. [SIZE=2].lib C:\Program Files (x86)\LTC\LTspiceIV\lib\cmp\standard.mos[/SIZE]
24. [SIZE=2].tran 0 0.1s 0s 0.001s[/SIZE]
25. [SIZE=2]* Solar Cell[/SIZE]
26. [SIZE=2]* Opamp power supply[/SIZE]
27. [SIZE=2]* Non-Inverting Amplifier[/SIZE]
28. [SIZE=2]* Gain = 5[/SIZE]
29. [SIZE=2]* <100 mV[/SIZE]
30. [SIZE=2].lib LTC.lib[/SIZE]
31. [SIZE=2].backanno[/SIZE]
32. [SIZE=2].end[/SIZE]
33.
The netlist won't work readily because I've appended the abovementioned model file to standard.dio.

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2. ### MikeML AAC Fanatic!

Oct 2, 2009
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One of your problems is your solar_cell model. The other is your circuit, and the third is knowing how to drive LTSpice.

Your model doesn't behave like a real solar cell/array. I dont know how to fix it, but look at the sim I have attached here. I am generating a dc sweep of Voltage of the cell V(pos) vs the Current drawn from it I(I2) [plotted along the x-axis]. I also show the Power delivered to the load V(pos)*I(I2). Note where the MPPT is. I have never seen a cell like that. Are you sure the diode is pointing the right way?

So lets fix your solar_cell model before worrying about the test circuit.

ps, the + in the middle of the .model statement looks like it shouldn't be there, but removing it doesn't change the results.

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• ###### Draft48.asc
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3. ### abhaymv Thread Starter Active Member

Aug 6, 2011
104
4
Thank you very much for your help!

I'm pretty sure the diode should be pointing in that direction. However, have I messed up the model file and swapped the pins of the diode? I'm not sure. I've verified the solar cell equivalent circuit from several sources. Here's Wikipedia:
http://en.wikipedia.org/wiki/Theory_of_solar_cells#Equivalent_circuit_of_a_solar_cell

http://pveducation.org/pvcdrom/solar-cell-operation/series-resistance
with
http://pveducation.org/pvcdrom/solar-cell-operation/shunt-resistance

Physics of solar cells: From Principles to concepts-by Peter Wurfel also gives the same diode direction. However, that model is slightly more complicated.

I don't know what the problem with the MPPT is, exactly. Could you clarify? Most of the plots I've seen with MPPT marked has the voltage on the X axis.

Another thing: Since the solar cell is assumed to be illuminated (this is the reason why the cell current source is 0.2 A), is there a need for an external current sweep?

EDIT: Found this useful article on simulating solar cells.
http://www.icrepq.com/icrepq'11/339-rodrigues.pdf
I'll try changing the ideality factor to 1.66 as it is commonly used in that article.

Last edited: Dec 14, 2013
4. ### MikeML AAC Fanatic!

Oct 2, 2009
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This looks a little better:

I vs V plot, and MPPT vs V

• ###### DF48c.jpg
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5. ### abhaymv Thread Starter Active Member

Aug 6, 2011
104
4

The maximum power point seems to be at a point that does not lie in the line joining the origin and the point (Voc, Isc). Is that the problem?

6. ### MikeML AAC Fanatic!

Oct 2, 2009
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Here is a way to test your idea without tripping over the specifics of a circuit. I am charging and discharging the capacitor using switches.

How do you find the MPPT by seeing V(cap) vs time???

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• ###### Draft48d.asc
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7. ### abhaymv Thread Starter Active Member

Aug 6, 2011
104
4
I didn't know ltspice was this flexible. I should invest some time to getting to know it better.

I'm not going to determine MPPT from V(cap) vs time. I'm thinking of finding it from V(cap) vs. I(cap). I(cap) will be measured with the help of a sense resistor. Both values will be sampled with an ADC and sent to the laptop where MATLAB does the further processing.

I should probably put a resistor in the discharge path to limit the large current flow during discharge...

Could you tell me why the capacitor charging and discharging didn't work for the old circuit as well? This is what I wanted to see with my old circuitry.

8. ### MikeML AAC Fanatic!

Oct 2, 2009
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There is almost nothing that you cannot do with LTSpice

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9. ### MikeML AAC Fanatic!

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Here a step toward your circuit, switches replaced with real NFETs, and suitable gate drive voltages.

Looking at your original circuit, it looks like the switching signal comes from a MCU port pin (0,5V)?

It looks like you have +15V available?

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10. ### MikeML AAC Fanatic!

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Here is my hack at driving the gates of the two fets. Note that the IRF7201 will tolerate up to +-20V on it's gate vs its source, so is well suited for this circuit. Some of the newer ones wont.

I went to some effort to make sure that the discharge NFET turns off before the charge NFET turns on. I would just use two port pins on the MCU with appropriate software delays to assure that the chg and dis signals do not overlap.

I would likely make C1 even bigger. This makes it so you don't have to sample the voltage/current so fast. How do you propose to sample the C1 current?

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11. ### abhaymv Thread Starter Active Member

Aug 6, 2011
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Thank you for your continued assistance.
That shows the MPPT as far as I can tell. In MATLAB, I'll be placing the sampled voltage and current data in two variables, then I'll be multiplying them. I can find the position of the maximum value and determine corresponding values of voltage and current.

Yes, MCU port has PWM output (0,5V). I will have a +15V supply since I need to drive lots of opamps. I'm using a PID temperature controller to drive a peltier.

The circuit you've provided (Draft48f) works well for the first cycle, but there is a DC offset from the second cycle. I've tried to minimize that offset due to inadequate discharging by modifying the RC values. The C is now 200μ and R is 2Ω. I'm getting a reasonably low DC level. Hopefully I can reduce it further with duty cycle and frequency modifications.

I don't understand the need for a 10V supply here, however. I simulated the circuit with a 5V supply and it seemed to work fine.

I'll probably drive the two MOSFETs with different PWMs to ensure that they do not overlap. I can avoid the extra circuitry that way, right?

C1 is double now. With an ATMega8 (15kSPS @10 bit) I can sample 22 points while C1 charges (in 1.5 ms). Should I be aiming for a higher sampling rate?

I'll be using a sense resistor and sample the voltage across it. I can then calculate the current from the program. However I realize that the value would be subject to errors due to the resistor tolerance. Do you know a better method?

The attached circuit seems to work without much problems...

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12. ### MikeML AAC Fanatic!

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You are not waiting long enough for the capacitor to discharge.

You will be alternating voltage and current samples on the ADC, so the ADC rate is halved. Depending on how much accuracy you want to get, I think you need more samples per charge cycle.

I would be inclined to make the capacitor bigger. Set the charge time and discharge time separately using two ports. Watch the power dissipation in the discharge resistor.

If you put a small resistor in series with the negative end of the capacitor, you can monitor the voltage drop across it during charging. Watch out because the polarity reverses across it during discharge. That might not be good for the A/D input.

5V is not enough to drive the gate of the charge NFet. That is why I used 15V,

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13. ### MikeML AAC Fanatic!

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Another thought occurred; and now I'm going to bed:

Why not dispense with MathLab, and just multiply the voltage and current on the fly in the MCU? A simple IF() statement software peak detector will find the MPPT inflection.
A MSP430 and lots of MPUs have hardware multiply nowadays if you need the speed.

Another idea. If you want a thousand samples along the charging curve, do the experiment 1000 times, delaying the sampling point a bit further along the curve each new sample. You could still do it in about one second...

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14. ### abhaymv Thread Starter Active Member

Aug 6, 2011
104
4
Those are some very helpful suggestions!

I used the popular software called PC1D to model solar cells so that I'd get a better idea of the parameters. My test area is 10 cm X 10 cm at max. So I can test a variety of cells of different sizes in that area. Consequently the range of currents that the solar cells give as output is very large. I didn't have hard data before, but simulating a 10 cm X 10 cm silicon solar cell at 25 °C under the standard solar spectrum yields a current as high as 3.183 A! The open circuit voltage doesn't vary much, but the current can vary between 0.1 A and approx. 3.2 A depending on the size of the device. This lead to some complications, but I've managed to arrive at a trade off.
Like you suggested, I've greatly increased the capacitance. Now its 40 mF. To make sure that the capacitor fully charges for even the least value of current (0.1 A), I've chosen the charging time as 275 ms. To discharge the capacitor to suitably small levels, the discharging time is 725 ms. Now the discharged value is around 10 μV. An IV characterization takes a second to complete, but I can get 4125 samples. Thus the system has approximately 2000 samples for charging and discharging.

I've placed a 0.03 ohm current sense resistor in the charging path, but separate from the capacitor. I didn't want the drop across the resistor to damage the electrolytic cap. The simulation shows a maximum current of 5 A through the sense resistor. So we have a 150 mV drop at worst case.

I've used a differential amplifier + clipping arrangement to extract out the positive waveform.

I'm facing a problem in sensing the current. I chose a 0.03 Ω resistor. The best tolerance available is 1%. The maximum short circuit current is 3.2 A. (The 5A appears only momentarily. I don't know why it appears during charging. It shouldn't. The solar cell can't source that...)

The problem occurs if we have a 1% error in resistor value. Due to error, the resistor value is 0.0303 Ω. However, since the resistor is very small, I have no choice but to use the value 0.3 Ω.

3.2 A current across 0.0303 Ω=>0.09696 V.
When I recover the value of current, I divide 0.09696 by 0.03 ohm. This leads to a measured value of 3.232 A. I have a 0.032 A error.

The main problem is that the error isn't linear. Since the current is changing, the error magnitude also changes. With a similar procedure, I get an error of 0.01 A! So I get different errors for different currents. Any way to circumvent this?

I'm using MATLAB because not only do I need the maximum power point, I also need to plot the characteristics for the user to see. Also plan to plot the maximum power as a function of load resistor graph. (VI vs. V/I). Then calculate the efficiency, fill factor, series and shunt resistances etc. etc.

I need the MATLAB anyway because the user can make certain adjustments to the spectrum of my light source. My project is an LED solar simulator, and the intensity of LED arrays can be controlled by the user. I'm using matlab for a lot of calculations other than this.

The second idea is superb. I'll try it when I get to the software side.

I've attached three models based on a minimum current value, maximum current value and a typical value.

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15. ### Alec_t AAC Fanatic!

Sep 17, 2013
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I find that generally gives weird results. Try another FET model.

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