SN74LVC2G74DCTR as a Divide by 2

Discussion in 'General Electronics Chat' started by Tim301, Feb 3, 2012.

  1. Tim301

    Thread Starter New Member

    Feb 3, 2012
    Hi folks,

    For many years, I have used a standard D type FF (74x74) to divide an incoming frequency. Hook the D input to the Q output, & works great.

    I just used one of the single section D-flops (see title & it's a little bitty part), and it didn't work.

    Both the Pre & Clr lines are tied directly to 3.3v, and the supply has good bypassing.

    To make it work, I had to put a 10k resistor in place of the D-Q connection and add some capacitance to the D side. (slowing the signal down).

    I substituted a standard 74HC74 in it's place (kludge on the board), and it worked fine without the extra circuitry.

    Am I seeing some kind of race condition due to the higher speed of the part?

    Looking at the data sheet, you have to hold data on the D pin at least 1.2ns after the clock rises, and the prop-delay through the part is 2.2ns. So, at least spec-wise, it looks like I have 1ns to 'spare'.



  2. MrChips


    Oct 2, 2009
    Peculiar. I think you're on to something here. I cannot see a reason why this is happening. These are very fast logic, 200MHz clock rates. The only thing I can think of is there is something peculiar about your set up - rise time/fall time, board capacitance, power supply etc. Perhaps contact the chip maker.

    Let us know when you find an answer.
  3. crutschow


    Mar 14, 2008
    Is the chip decoupled with a small ceramic cap (0.01 to 0.1μF) directly between the power pin and ground pin?