Simulating / Plotting Output Impedance in SPICE

Discussion in 'General Electronics Chat' started by newbie217, Jan 31, 2011.

  1. newbie217

    Thread Starter Active Member

    Apr 12, 2009
    52
    0
    I'm trying to figure out how to plot, simulate and calculate the output impedance (rds) of a simple, diode-connected NMOS.

    I'm using the following model:

    .model MBREAK2 NMOS (w = 5u l = 1u vto = 0.7 kp = 110u gamma = 0.4 lambda = 0.04 phi = 0.7)

    1) I set the DC bias = 1.0 V and run a transient simulation to obtain the bias currents, voltages.

    2) I see that the transistor is in saturation, and use the following equation: gm = 2ID / (VGS - VT) = 2(25.74 uA) / (1.0 - 0.7) = 0.172 mS. I can see my hand calculation matches the simulation number.

    3) The textbook says ro ~= 1/gm. 1/0.172 mS = 5.8 k. Is this how to calculate rds? How do I simulate / verify this information?

    4) Lastly, I'm still confused about static resistance vs. dynamic resistance. I ploted some data points and used: (V2-V1)/(I2-I1) in one column and simple V/I in the other column. For small changes to the bias point, is this the change reflected on rds? What does the static resistance V/I tell us? How can I simulate this?
     
  2. newbie217

    Thread Starter Active Member

    Apr 12, 2009
    52
    0
    I left out ro = 1/(lambda*ID) = 1/(0.04 *25.74 uA) = 971k. Not sure how to relate this information w/ the above calculation :confused:
     
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