Simple AGC circuit using J176, LM358 and 2N3904

Discussion in 'The Projects Forum' started by sakshi.rawal, Nov 3, 2015.

  1. sakshi.rawal

    Thread Starter New Member

    Oct 6, 2015
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    Hi

    I have this AGC circuit which I need to simulate.
    http://electronicdesign.com/site-fi...ctronicdesign.com/files/29/6272/figure_01.gif

    Could anyone please help me with a detailed circuit description as to how this AGC works. I don't want to simulate it blindly, without knowing how it works. The only description I found was this.
    http://electronicdesign.com/analog/effective-agc-amplifier-can-be-built-nominal-cost
    I need to understand why the output should remain constant at 1.2 Vp-p for different frequencies. And what should I change if I want to change the output level?
    Will be a great help. Thanks :)
    Eagerly awaiting a response.
     
  2. MikeML

    AAC Fanatic!

    Oct 2, 2009
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    Q1 detects peak voltage of the output. (Envelope detector)
    Lowpass filtered by R8 and C4.
    Q2 acts as a voltage-controlled resistance, but is linear only for small signal at its drain...
    R2/Q2 forms a voltage divider.
    You understand U1a as an AC-coupled amplifier, right?
     
  3. Dodgydave

    Distinguished Member

    Jun 22, 2012
    4,980
    744
    If you want to change the output level, alter the gain of the op amp, or the voltage applied to Q1 npn, by a preset resistor to its base.

    It would be helpful if you can tell us what your plans are to use it.
     
  4. crutschow

    Expert

    Mar 14, 2008
    13,003
    3,232
    The output regulated peak voltage is basically equal to the Vbe of Q1.
    It is only slightly affected by the op amp gain.
    A resistor to Q1's base (series?) will also have only a small effect on the output voltage unless you make it large enough to starve the transistor base current.

    If you connect Q1's base to the output of the pot P1 then you can adjust the regulated output voltage with that.
    For example at a 50% pot wiper setting the op amp output will be about 2.5V pp.
     
  5. sakshi.rawal

    Thread Starter New Member

    Oct 6, 2015
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  6. sakshi.rawal

    Thread Starter New Member

    Oct 6, 2015
    6
    0
    Hi
    Thank you for your replies. Here are the things I don't understand to be precise:
    1. How does the OPAMP LM358 get the negative supply at its inverting input
    (pin 2). I see a 10 uF capacitor and 470 ohm resistor (C2 and R5) in series there.
    2. What is the purpose of R1 and C1. C1 will block AC, I believe. But not sure how does that help.
    3. Why is there a voltage source of 5V required at R3||R4 (Voltage divider as per description)
    4. What is the purpose of C3?
    5. R8 AND C4 make up a filter as pointed by one of the members in the post above. Again, how does that help and why is a voltage source needed (5V)
    6. What is the purpose of R7?
     
  7. sakshi.rawal

    Thread Starter New Member

    Oct 6, 2015
    6
    0
    Hi.
    Thank you for your reply. I need to do a transient analysis for different frequencies with at various input levels.
     
  8. sakshi.rawal

    Thread Starter New Member

    Oct 6, 2015
    6
    0
    Hi
    Thank you for your replies. Here are the things I don't understand to be precise:
    1. How does the OPAMP LM358 get the negative supply at its inverting input
    (pin 2). I see a 10 uF capacitor and 470 ohm resistor (C2 and R5) in series there.
    2. What is the purpose of R1 and C1. C1 will block AC, I believe. But not sure how does that help.
    3. Why is there a voltage source of 5V required at R3||R4 (Voltage divider as per description)
    4. What is the purpose of C3?
    5. R8 AND C4 make up a filter as pointed by one of the members in the post above. Again, how does that help and why is a voltage source needed (5V)
    6. What is the purpose of R7?
     
  9. MikeML

    AAC Fanatic!

    Oct 2, 2009
    5,450
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    It is not negative. In fact it is 2.5Vdc (5V/2). It comes from the output pin of the opamp (feedback) through R6.

    R1 makes sure that the input is at 0V. (No bias through Q2). Left end of C1 is at 0V; right end is at 2.5V, so is blocking DC while passing AC.

    Pin 3 of the opamp is biased midway between gnd and 5V. Due to negative feedback at DC, that puts pin 1 and pin 2 at 2.5V, too.

    Block DC; pass AC

    .
    The 5V pulls the gate of Q2 high (slowly); the NPN collector pulls it low (fast). The higher the gate voltage of Q2, the more the input signal is attenuated by the voltage divider consisting of R2 and Q2, which is how the AGC is accomplished. The low-pass filter time-constant has a fast attack, slow decay, and the decay time is long enough to pass the envelope of the input waveform (words if speech).

    To overcome a defect in the LM358 that would otherwise cause cross-over distortion in the audio signal
     
  10. Bordodynov

    Active Member

    May 20, 2015
    637
    188
    When power is 5 volts maximum output amplitude of ~ 1.2V (Vout_max = Vcc-VbeDarl-Vs = 5V-1.1-0.2V = 3.7V). The average level of the output voltage is half the supply voltage (for R3 = R4 = 240k)--> 3.7v-2.5V=1.2V.
    To be able to produce more output voltage is necessary to increase the supply voltage. But it makes no sense at this fixed voltage. More input would give more harmonic distortion on the channel resistance of the FET.
     
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