I have to project a serial to parallel converter that converts a serial bit Stream (Data_in) in a parallel signal of 8 bits (Data_out). The least significant bit, Bit_0, arrives by first and is shown by a high level on the First_bit signal (it always occurs every 8 Clock blows). When the new datum is ready it is necessary to raise the Data_out_valid signal for a Clock blow.
How can i do it?
where can i find the source code and a testbench for this circuit?
help me, thanks Francesca
How can i do it?
where can i find the source code and a testbench for this circuit?
help me, thanks Francesca