While good conceptually, physical diffusion of dopants into wafers to create source and drain regions of MOSFETs is obsolete. Ion implantation has been used for years, instead.

Is it worth mentioning that in the article, or does the simplicity of diffusion win the day?

Excellent chapter, by the way.

 

While good conceptually, physical diffusion of dopants into wafers to create source and drain regions of MOSFETs is obsolete. Ion implantation has been used for years, instead.

Is it worth mentioning that in the article, or does the simplicity of diffusion win the day?

Excellent chapter, by the way.

It's mainly obsolete in later steps as Ion implantation has been used more and more but the diffusion process is still used quite a bit for bulk dosing of wafers in the early stages where you can skip anneal steps that would be needed for each bulk implant. The two complement each other when cost and throughput are factors as you can typically buy several diffusion machines for the price of one implanter and use the implanter for shallow prediffusion layers for later drive-in step with a furnace. The precision of implanter dosing is a requirement is some bleeding-edge chips but for plain-jane stuff the diffusion furnace is still king in some domains for the little guys.

 

It's mainly obsolete in later steps as Ion implantation has been used more and more but the diffusion process is still used quite a bit for bulk dosing of wafers in the early stages where you can skip anneal steps that would be needed for each bulk implant. The two complement each other when cost and throughput are factors as you can typically buy several diffusion machines for the price of one implanter and use the implanter for shallow prediffusion layers for later drive-in step with a furnace. The precision of implanter dosing is a requirement is some bleeding-edge chips but for plain-jane stuff the diffusion furnace is still king in some domains for the little guys.

I completely agree with you. That is why I specified "source and drain regions of MOSFETs".

But wow, what markets still have the diffusion furnace as king for designing MOSFETs? I'm not aware of any CMOS processes at least that don't use a self-aligned gate, which is very hard to do without ion implantation. I'm talking about at processes at least 20 years old so this isn't bleeding edge. What companies are still using gaseous diffusion to define the source and drain regions for MOSFETs? This is very interesting and news to me!