Ring Oscillators, high frequency clock generation, and parasitic BJT characteristics.

Discussion in 'General Electronics Chat' started by Austin Clark, Aug 20, 2012.

  1. Austin Clark

    Thread Starter Member

    Dec 28, 2011
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    Woot, questions time! :p

    Ring oscillators require you to have an odd number of NOT gate stages, it's obvious why, HOWEVER, the exception is one. You can't have a ring oscillator with only 1 stage. Why is this? I figure it's probably because the circuit has a stable state at some point, but how/why? I heard somewhere on this forum that it DOES actually oscillate, but I have tested it with no measurable oscillation (I use a single transistor per NOT stage). A little mathematical explaination would be nice, especially if you can explain it intuitively as well. Also, what determines the rise/fall times of the resulting oscillations? Usually I've been using schmitt triggers to speed it up, but what can I do to help improve it without the triggers? I've used several extra buffer stages, and that helps a little, but it's just not enough for me.

    Will having poor rise-fall times effect my digital circuits? If so, in what way and why?

    What parasitic characteristics (Capacitance, inductance, etc; ) should I consider in high-frequency digital BJT circuits? Is there an equivalent circuit diagram I could use? It seems that these parasitic characteristics are keeping me from getting fast clocks and fast logic gates from my BJTs (Mainly 3904s and 3906s). What "tricks" could I use to quicken their trasition times, and why do these tricks work? Low-power is also in my interest, for the extra challenge I would like to make my circuit as low-power as possible, but that's really just tertiary.
     
  2. ramancini8

    Member

    Jul 18, 2012
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    Requirements for a single digital gate to oscillate; biased so no stable state exists, feedback with 180 degrees phase shift. There are two parasitic capacitors associated with every gate at the input and output, and with the proper resistor these can be made to attain 180 degrees phase shift at some frequency. Much harder to do with a single transistor.
     
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  3. Austin Clark

    Thread Starter Member

    Dec 28, 2011
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    I'm curious about these ideas because I want to be able to increase the performance of my digital circuits. I want to be able to work in the MHz region. My large-scale projects regarding these concepts are things like 8-bit full adders, small RAM modules, Multiplexers/demultiplexers, etc;
    In the end I wish to design and build a basic computer, but of course that is still quite a ways away. I want to put performance in mind early on.
     
  4. Ron H

    AAC Fanatic!

    Apr 14, 2005
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    Here is an example of two 3 stage ring oscillators. One is built with 2N2369s, the other with 2N3904s. All resistors are the same in both circuits.
    Note that the 2369 osc oscillates at 33MHz, so the delay per stage is about 10nS. The 3904 osc oscillates at 361kHz, for a delay per stage of about 923nS.
    Pretty remarkable, eh? As you can see, transistor selection is critical to speed. Even though 2N3904 has respectable Ft and junction capacitances, the storage time is terrible! 2N2369 was designed as a high speed saturating switch, so it is optimized for this application.
    If you build a computer (or even a small portion of one), you will find that speed can be your enemy. Short propagation delays (primarily caused by storage time) might not be, but fast rise and fall times may be. This is because your hardware will necessarily require a lot of space, and space means long wires, and long wires result in over- and undershoot and ringing, which, if excessive, can result in unwanted glitches, multiple clock pulses when you want only one, etc.
    If you do this you will learn A LOT, which I am sure is your goal.
     
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  5. Austin Clark

    Thread Starter Member

    Dec 28, 2011
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    I thought that junction capacitances were what caused the "storage time"?

    I wish I hadn't bought so many of these darned sluggish BJTs then (I think it was 100 or maybe even 200 2n3906s and 2n3904s), even though they're extremely popular. I took a guess in picking with ones to use, a shot in the dark, and made a mistake. BUUUUT, as you said, all I care about is learning, and it's a small price to pay for the experience. I'm actually amazed that that other transistor set will oscillate at such high frequencies... it's a perfect way to test my scope again! Maybe these different transistors will oscillate with themselves, and I can experiment with that better.

    If the other transistors are so quick, I may not be so worried about optimization anymore, but I'm still interested in how it would theoretically be done. When trying to get the highest output frequency from my 2n3904s, I found that lower value resistors made things quicker, and that adding extra resistors to the base-emitter lowered the delay time. I assumed this had to do with junction capacitance or something. I also noticed that input voltage mattered, and that LOWER voltage actually seemed to speed things up.
     
  6. Ron H

    AAC Fanatic!

    Apr 14, 2005
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    Higher power --> more speed. That's the price.
    Regarding storage time: When you saturate a BJT, you apply more base current than the minimum required for saturation. This is because beta varies from unit to unit, and with temperature. The excess current causes excess charge to accumulate in the base region. This charge must be removed before the transistor can turn off.
    To ensure saturation, you should make Ib≈Ic/10.
    A'm attaching the results of two simulations. One panel shows switching speed vs power (collector current) and transistor type. The other shows collector current and base current for the first scenario in the first panel. Notice that the base current changes direction when the input goes to zero. This is because the base is still at ≈0.7V until the excess charge is removed from the base.
    You can learn a lot about trends like this by using a simulator. Quantitative results must be taken with a grain of salt, because models are just that. However, qualitative trends such as those in the attachments can be very illuminating. I use LTspice.
     
    Last edited: Aug 22, 2012
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  7. Austin Clark

    Thread Starter Member

    Dec 28, 2011
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    Always very helpful, thank you. :)

    The second image seems to indicate that BJTs are, indeed, actually voltage controlled (even though it's all really just semantics). There's a negative current from the base, but the collector current is still positive. The math is just typically easier to work with if you consider BJTs to be current-controlled I think.

    Another interesting thing I'm noticing is that the reverse current coming from the base (as it's excess charge is leaked away) doesn't behave like a capacitive discharge. It remains stable until it suddenly "drops off". Any idea why this may be and/or how it could potentially be modeled?

    In the end, switching speed comes down to two main factors. Internal parasitic capacitance/inductance, and stored charge in the base.

    If you PERFECTLY saturated a BJT (Wasted no extra current to ensure saturation takes place) would the storage time decrease? Less resistance at the base increases the excess current, but allows the base to discharge quicker, right? Is there an "optimal point"?

    I usually use 10X the resistance at my base as I do my collector, I found this to be the best experimentally and practically (as my main resistors are multiples of 10 on my desk). Looks like I'll stick with that ratio. :)

    I have a LOT of reading to do. I have a pretty gnarly collection of related material now thanks to an older uncle. :)
     
  8. Ron H

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    Apr 14, 2005
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    You avoid excess base charge by preventing the C-B junction from becoming heavily forward-biased, as it is in saturation. This can be done by connecting a small-signal (LOW capacitance) Schottky diode from base to collector, anode to base. This is called a Baker clamp. Excess base current is diverted through the diode to the collector. It is actually level-sensitive negative feedback.
    The penalty is a relatively poor logic "0" at the collector (assuming positive logic). See the attached simulation results. If you use this scheme, you have to make sure that the logic "0" threshold of your inputs are high enough to be reliably switched with a ≈0.5V logic output "0" level. This must include a noise margin to accommodate undershoot and ringing, which I mentioned previously.
    I see that Jameco has these diodes for $0.29, but you probably would have to act fast, because they are a closeout item.
    Small-signal Schottky diodes may be readily available in packages that you, as a hobbyist, can actually use, but they seem to be rare.
    BTW, Baker clamps are used in the Schottky TTL and low-power Schottky TTL logic families. Search for more info if you are interested.
     
    Last edited: Aug 23, 2012
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