My friend gave me abunch of practice problems for practice and got kinda stuck on this. I tried labeling a KCL for each node with the current leaving the + end of the independent source. But I circled the problem resistor red and gave two ways it might begin,either (X or Y).Any help would be great on how to start it. X seems more logical imo
Last time I checked, the algebraic sum of current going in a node must equal current going out of the node.Picture below. Please let me know if I made a mistake. And I know I could just hook up a 1Amp source to it and find the voltage across the source and use Req=Vtest/Itest in a real world application if I cant figure it out or if its irreducible.