Register composed of T flip flops analysis?

Discussion in 'Homework Help' started by Gonzalo Armbrust, Oct 29, 2015.

  1. Gonzalo Armbrust

    Thread Starter New Member

    Jun 28, 2015
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    I have attached the circuit in a PNG file below. I'm confused about what exactly is the bottom wire that connects to all the T flip Flops ( the output that is produced by the NAND gate at the end of the T flip flop sequence and fed into the bottom of each T flip flop, with the bubble on the end)

    Is this representative of the load being fed into the circuit, or the common clear signal( Clr)....I can't really tell which it would be, could anyone clarify? Otherwise I can't really solve this problem.
     
  2. dl324

    Distinguished Member

    Mar 30, 2015
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    Not labeling the input must be a mistake. I'd assume it is CLEAR.
     
  3. WBahn

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    Mar 31, 2012
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    It's a negative-logic (i.e., active-LO) reset signal.

    This is an example of an asynchronous circuit that is almost always a bad idea (bad because it almost certainly has not been properly analyzed to ensure that there are no critical races or glitch hazards).
     
  4. WBahn

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    Mar 31, 2012
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    It's arguably a bit sloppy, but there is a very well-established convention that, for FFs, the signal on the bottom is an asynchronous clear and the signal on the top is an asynchronous set and the signal with the edge-triggered symbol is the clock input.
     
  5. dl324

    Distinguished Member

    Mar 30, 2015
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    That's what I would have done, but I found this reference that put the CLEAR input on the top
    http://www.cs.umd.edu/class/sum2003/cmsc311/Notes/Seq/flip.html
     
  6. WBahn

    Moderator

    Mar 31, 2012
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    At least it's labeled!

    If there is just a single async input, it is almost always a clear input. If there are two, then it becomes important to either label them (preferred) or follow a well-established convention.

    I could understand not labeling common inputs when things were drawn by hand. But now that we have EDA packages and you define the symbol one time? How hard can it be to design the symbol properly? Having designed many symbol libraries, I can tell you that the answer is that it isn't very hard at all.
     
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