Hi!
I'm conecting a CMOD board from Xilinx (it has a Xilinx Coolrunner 2 CPLD) to the parallel port of my PC in order to read/write from/in it. The problem I have is that the logic levels from de port are TTL ('0'=0V and '1' or 'HZ'=5V) while my CMOD reads/writes voltages defined as LV-TTL, that is: '0'=0V and '1'=3,3V.
Power supply Vcc of the CMOD board is 3,3 from a source generator. In my ignorance, i connected directly the port pins, to the CMOD pins, and when the port pins were at 'HZ' i observed that de source generator went from giving 3,3 volts to almost 4V! I suppose that happend because de current limit was exceeded. It's oviously not good...
I guess i have to put some kind of regulator between each pin of de parallel port and the pins of the CMOD in order to reduce the voltage supplied by the port. Or should i put some resistances?
I would kindly appreciate any suggestions and solutions as to how resolve this problem, specially since i have very little experience with this kind of circuit problems.
I'm conecting a CMOD board from Xilinx (it has a Xilinx Coolrunner 2 CPLD) to the parallel port of my PC in order to read/write from/in it. The problem I have is that the logic levels from de port are TTL ('0'=0V and '1' or 'HZ'=5V) while my CMOD reads/writes voltages defined as LV-TTL, that is: '0'=0V and '1'=3,3V.
Power supply Vcc of the CMOD board is 3,3 from a source generator. In my ignorance, i connected directly the port pins, to the CMOD pins, and when the port pins were at 'HZ' i observed that de source generator went from giving 3,3 volts to almost 4V! I suppose that happend because de current limit was exceeded. It's oviously not good...
I guess i have to put some kind of regulator between each pin of de parallel port and the pins of the CMOD in order to reduce the voltage supplied by the port. Or should i put some resistances?
I would kindly appreciate any suggestions and solutions as to how resolve this problem, specially since i have very little experience with this kind of circuit problems.
