re:textbook problem

Discussion in 'Homework Help' started by vishwanath.barath, Oct 23, 2008.

  1. vishwanath.barath

    Thread Starter New Member

    Oct 23, 2008
    3
    0
    i have exam tomorrow.urgent help required

    the problem is

    draw the logic diagram of a 4 bit register with 4 D flip flops and four 4 to 1 multiplexers with mode selection inputs s1 and s0.The register operates according to the following function table.

    S1 S0 Register operations
    0 0 No change
    0 1 Complement the four outputs
    1 0 Clear register to 0(synchronous with the clock)
    1 1 Load parallel data
     
  2. vishwanath.barath

    Thread Starter New Member

    Oct 23, 2008
    3
    0
    pls help me
     
  3. vishwanath.barath

    Thread Starter New Member

    Oct 23, 2008
    3
    0
    this problem is from digital logic design by morris mano

    problem-->

    6.7
     
  4. beenthere

    Retired Moderator

    Apr 20, 2004
    15,815
    282
    The Homework Help section asks that you post up the work you have done so we can see it and find where you went wrong, or suggest better approaches. We will not do all your work for you, no matter how little time is left before it must be submitted.

    If you are in doubt about how to structure your post and what to include please read this thread.

    Thank you.
     
  5. veritas

    Active Member

    Feb 7, 2008
    167
    0
    For a second I was thinking "You only need one 4-to-1 multiplexor," but then I realized you probably can't use one with multiple-bit inputs/output.

    For this task, you can compute each of the 4 potential inputs in parallel. The 4-to-1 multiplexors will select between them to get the actual new input for each bit.

    I would suggest designing a diagram for a single bit and showing us your work.
     
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