I might be way off by some factor truth i dont know about, F stands for PNP transistor and B stands for NPN transistor. P is positive, N is negative, because i dont know what im doing, the general idea is really the only thing totally factual here.

Ill get my arse into doing TTL properly soon!

that picture is 2 bits only, because you have to put a space between, to fire the advancement clocks at once, and you toggle the advancement clocks as well, so to get 134 megs takes 168 billion transistors, so its about 1100 transistors a megabyte, so its well not anything useful yet.

 

its missing extra positives it needs, im just putting this here for fun, i was wondering if other guys do npn pnp designs? even though i cant DO IT FOR NUTS YET!!!

 

Could you draw that as a normal schematic? This mess is beyond recognition. Also a description of what that circuit is supposed to do would be nice.

 

Its ram setting itself in a chain! (machine gun ram) it works by rotation of its chain loop.
I cant trace schematics in general just yet... im still learning. this design doesnt work as it is.
Only the general idea. If you could draw what your version it would be cool. but dont feel obliged.

 

Are you trolling? It looks like you're making up and posting nonsense ... obscured just enough to look like something serious.

You can draw these meaningless ASCII diagrams, but you don't know how to draw schematics?

1,100 transistors / megabyte, huh? As in, 1,100 transistors per 8,388,608 bits of data?

"Machine Gun" RAM? That's just funny.

 

Im serious, i dont like wasting peoples time, but im just a beginner.
Its just memory in a chain. this could be a standalone unit with 3 prongs, 1 activate, 2 read, 3 write. then automatically read&writes on the lead bit, and steps.

 

Its ram setting itself in a chain! (machine gun ram) it works by rotation of its chain loop.
I cant trace schematics in general just yet... im still learning. this design doesnt work as it is.
Only the general idea. If you could draw what your version it would be cool. but dont feel obliged.

It looks like it should work, now build it and let us know how you get on.

 

yes sir. its 14 a bit, oops i think i got my megs mixed with my k's... ill get back to it later.

 

A simple SRAM cell has six transistors per bit. Not sure what advantages is your design supposed to have.

 

thanks for telling that. its only disadvantages, cause i dont know what im doing yet. its just a silly novice design i put together. But it could be useful, but i best keep my speculations to myself...