R/2R DAC speed limitations

Discussion in 'General Electronics Chat' started by Shagas, Sep 28, 2014.

  1. Shagas

    Thread Starter Active Member

    May 13, 2013
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    Hello

    Could someone advise how I could speed up an R/2R DAC made of discrete resistors on a breadboard (8-bit)?
    So far I'm using 10k/20k 1% and the output starts deteriorating after shorter than 1uS rise/fall times are required.

    I'm guessing the input capacitance of the scope messes with the high output impedance of the R/2R chain but I've tried buffering it with an op amp with only marginally better results.

    Will reducing the chain to 1k/2k give me better results?
    Will building the dac on a PCB give better results?

    My target is at least 100nS or shorter rise/fall times.
    I'm using a 50Mhz FPGA to drive the R/2R chain.
     
  2. MrChips

    Moderator

    Oct 2, 2009
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    What is the make, model and bandwidth of your scope?
    What is the make, model and bandwidth of your scope probe?
     
  3. Shagas

    Thread Starter Active Member

    May 13, 2013
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    Brand: OWON DS6062V
    BW : 60Mhz , 500MS/s
    Probes : T5060 -> Rated at 60Mhz with about 20pf @ 10x (which is what I use) .

    I doubt that the issue is the scope because I've already measured signals faster than 40 and 50 Mhz with no problems.

    Also I tried several Op amps with decent slew rates ( > 12V/uS ) . My input signal is 3.3V pk-pk so that should be the issue either.
     
  4. crutschow

    Expert

    Mar 14, 2008
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    It would seem like you should get a faster rise-time than that, even for typical breadboard stray capacitances. I doubt that putting it on a PCB will significantly affect that. Did you measure the risetime of the signal out of the FPGA to the R-2R input?
     
  5. MrChips

    Moderator

    Oct 2, 2009
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    My guess is you are doing something wrong. You should be getting lower than 50ns rise/fall times.
     
  6. Shagas

    Thread Starter Active Member

    May 13, 2013
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    I scope the FPGA outputs and the rise/fall times are < 10nS as expected. Well if anyone has an idea , let me know.
     
  7. crutschow

    Expert

    Mar 14, 2008
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    Post your circuit diagram and a picture of the layout, if possible.
     
  8. ronv

    AAC Fanatic!

    Nov 12, 2008
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    Are you sure the problem is with the ladder and not the speed of the op amp used for it?
     
  9. Alec_t

    AAC Fanatic!

    Sep 17, 2013
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    I haven't calculated that impedance, but 20k x 20pF = 400nS time constant; rather too close to your 1uS pulse width?
     
  10. alfacliff

    Well-Known Member

    Dec 13, 2013
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    what swwitch are you using to do the r/2r switching? how fast can it switch? how much input output capacitance for the switch?
     
  11. Shagas

    Thread Starter Active Member

    May 13, 2013
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    I got myself a bunch of 1% 1.1k / 2.2k resistors and remade the ladder using them . The results are much better. I can get <50 ns rise/fall times
    when scoping the output of the dac directly.

    The next problem is that i'm going to use the output of this dac to drive a 75Ohm vga signal. The question is , what do I buffer the output of the dac
    with?
    A simple try using an op-amp buffer failed. I'm getting very bad results for some reason , even at lower speeds. What can the issue be (the issue is not a failure of driving the output close to the rails)?
    I'll upload a schematic and scope output pictures when I get home from uni.
     
  12. MrChips

    Moderator

    Oct 2, 2009
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    Use a single NPN transistor in a voltage follower configuration.
     
  13. Shagas

    Thread Starter Active Member

    May 13, 2013
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    Do you think that this will suffice ? Or should I put a simple two-transistor current source instead of the emitter resistor?
     
  14. Shagas

    Thread Starter Active Member

    May 13, 2013
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    It seems to be working . Thanks
     
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