Question about pull-up resistors

Discussion in 'General Electronics Chat' started by dumindu89, Sep 6, 2012.

  1. dumindu89

    Thread Starter Member

    Oct 28, 2010
    1. What is meant by open collector output?
    2. What is the relationship between pull-up resistors and open collector output of a particular IC?
    3. Are there limitations when we choosing resistor values for pullup resistors ?
  2. nigelwright7557

    Senior Member

    May 10, 2008
    1/ a transistor that doesnt have a pull up resistor on the collector.
    2/ The pull up resistor mustnt take more current than the IC can sink.
    3/ Yes, limited by IC current capability.
  3. MrChips


    Oct 2, 2009
    Open collector means that there is nothing connected internally to the collector of the output transistor. This means that the circuit can sink current (pull current to GND) but cannot be a source of current.

    Since there is no source of current the output pin never goes above 0V. For this to happen, you have to provide a voltage source via a pullup resistor to some positive voltage.
    The value of the resistor will determine how much current you wish to supply or sink.

    Suppose your supply voltage Vcc is 5V and you wish the output to supply 1mA while the output voltage is 4V. Then the voltage drop across the pullup resistor is 5V-4V = 1V.
    The value of the pullup resistor R = 1V/1mA = 1kΩ

    Now if the output voltage = 0V, the output transistor has to sink 5V/1kΩ = 5mA.

    The pullup resistor has to dissipate 5V x 5mA = 25mW
    You don't want the resistor to be too low otherwise you will exceed the current sink capabilities of the output transistor and the output voltage will rise too far above 0V.

    You don't want the resistor to be too large otherwise the next gate you are feeding may not get enough current and the output voltage will fall too far below 5V. Hence you need to find out how much current the next gate requires to maintain a logic HIGH.

    For TTL gates a pullup of 1k to 5kΩ works for most cases.
    For CMOS gates,10k to 50kΩ is adequate.
    absf likes this.