Query regarding wire and reg

Discussion in 'General Electronics Chat' started by pra_vlsi, Nov 13, 2009.

  1. pra_vlsi

    Thread Starter New Member

    Nov 13, 2009
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    0
    Hi All,

    I am not able to understand the difference b/w wire and reg when it comes to synthesis. What I understand is that, a reg stores a value when an even occurs on signals in its sensitivity list while a wire is continuously assigned.
    I have come across a shift register code, a snap shot of which I have attached with this mail. The snap shot also shows the RTL view of the shift reg in which I am not able to notice the difference b/w wire and reg, and also the RTL view for ascending and descending part of the variable.
    Plz help me in understanding this.
     
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