PWM Switching out of bounds

Discussion in 'The Projects Forum' started by Enforcer83, Aug 1, 2011.

  1. Enforcer83

    Thread Starter Member

    Oct 29, 2010
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    I am trying to create a tri-state inverter using PWM based on Op-amps and comparators similar to the paper found here.

    The difference between my design and the one in the paper is that I am trying to design mine to operate from a bipolar supply instead of a unipolar supply (-15 to 15 versus 0 to 12).

    The design is in modular form. As I get each module working, I combine them in a master simulation. The module for generating the Sinusoidal, Triangle, and Square waves is working correctly, at least in simulation. I am attempting to get the theory and initial design down before hitting the hardware and building the system.

    The problem in this simulation exists around the zero crossings, see attached schematic and output. The PWN is not switching to a low state, which will eventually turn off the High side N-Channel MOSFET of an H-Bridge (see circled areas of output). I think the problem has to deal with my frequency selection for the triangle wave. Any ideas?

    I am missing something, I know it, I just do not know what. Perhaps someone here at AAC can help.
     
  2. praondevou

    AAC Fanatic!

    Jul 9, 2011
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    Could you post a picture of your circuit with a better resolution?

    I didn't read through the whole link you posted, but a circuit that works (I built it once but didn't use the TL as a comparator) is in the attached picture. When I built it the triangular wave and the sine wave had fixed values (zero at GND)

    The triangular wave goes to the two non-inverting inputs of the comparators. The sine wave is inverted once and goes to the inverting inputs. At the output I'll have a PWM that needs to be level shifted.

    Then it can passed it through a 4502 (not in the picture) to obtain 4 gate drive signals (have to pass through a deadtime circuit as well)

    I'm not quite sure why yours isn't working because it's not exactly clear what voltage/signal you have at what input.

    Please note that in the circuit I posted the triangular has to be bigger than the sine wave, otherwise I don't generate PWM at the sine wave peaks, which means two of the FETs/IGBTs may stay ON for too long, this saturating the transformer/inductor.
     
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    Last edited: Aug 1, 2011
  3. SgtWookie

    Expert

    Jul 17, 2007
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    I believe I see what's going on. Your sine wave is centered around 0v, but your comparators are single supply; they can't "see" anything below 0v.

    Instead of single-supply comparators, you need to use a comparator with an accessible output emitter ground, like the LM311. That way you can keep the output range from 0v to Vcc, but still use a bipolar supply, and be able to "see" inputs below 0v.
     
  4. t_n_k

    AAC Fanatic!

    Mar 6, 2009
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    Enforcer83

    The problem seems to extend beyond the zero crossings - there is no PWM control output into the negative half cycle of the sine wave.

    Presumably you are looking for a comparator output similar to that shown in figure 23 of your pdf attachment.

    It's probably simply a matter of the biasing / offset levels of the relative signals which is inhibiting the comparator(s) from switching correctly.
     
  5. t_n_k

    AAC Fanatic!

    Mar 6, 2009
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    The control PWM outputs should probably look similar to the graph in the attached pdf.
     
  6. Enforcer83

    Thread Starter Member

    Oct 29, 2010
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    Ok, I tried each of your suggestions and found a combination of SgtWookie's and t_n_k's post to get close to what I am looking for (see attached).

    It looks like I am going to have to play with some and gates, buffers, and inverters to get logic zeros when I need the high or low side fets to be off before sending everything to my gate drivers (not shown) unless there is another suggestion. Example of when the fets need to be off are during opposite cycles, high side fet should be off during the negative cycle and low side fet should be off during the positive cycle.

    Otherwise, do the rest of the signals look right?
     
  7. SgtWookie

    Expert

    Jul 17, 2007
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    Gee, you forgot to attach whatever you were planning on attaching.

    Anyway, have a look at the attached schematics & simulations. I'm using an LM111 (high-temp version of the LM311) with a bipolar supply and the output transistors' emitter grounded.

    The 1st attachment shows a full sine wave cycle's worth; the 2nd is zoomed in to just one transition so that you can see the timing.

    Q1/Q2/R3 are a constant current source, Q3/Q4/R6 are a constant current sink. These cause Tri1 and Tri2 to have offsets from the input Tri, with the result that there is ~3uS "dead time" from when out1 turns off and out2 turns on, and vice versa. Unless your MOSFET driver circuits will have some means of providing dead time, you'll burn up your MOSFETs in a jiffy.

    Also, you never want your sine to exceed your triangle wave. Drivers like the IR2110 that have a boost cap need to be switched regularly, or the boost cap will discharge and your high-side MOSFET will be toast.

    The constant current sources/sinks are shown as discrete transistors; but you really need to use IC's with dual matched transistors on a substrate; otherwise temp variations and transistor differences will upset the balance.
     
    Last edited: Aug 2, 2011
  8. Enforcer83

    Thread Starter Member

    Oct 29, 2010
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    Oops, sorry. Here you go.

    SgtWookie, could you provide me with some equations so I may "program" my dead time using your design if I decided to?

    The risks of not having any dead time I am quite aware of. I am reading a book on switchmode power supplies by A. Pressman and they beat that concept into you early on. At the time of my original post I had not yet had any ideas on how to insert dead time, and I will consider your solution.

    FYI:

    The other two comparators are for the other half of the H-bridge output section and control the direction of the wave form.
     
  9. SgtWookie

    Expert

    Jul 17, 2007
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    Well, you start off with:
    Ic= (+V-(-V)-.62)/Rc
    ...to get the collector current in the mirrors. For example, Q1's collector resistor is R3, and it's 100k. The supply rails are ±10v, and the .62 is Q1's approximate Vbe.
    So, Ic = (10-(-10)-.62)/100k = 19.38/100k = 193.8uA.

    Then, you calculate the offset voltage caused by that same current flow through the mirrored collector across the resistor between Tri and Tri1, in this case R4.
    Voffset = Ic*Rtri = 193.8uA*470 Ohms = 91.086mV

    Then you calculate how long it takes for your triangle wave to transition through 91.086mV, and that's 1/2 of your dead time - as both Tri1 and Tri2 are 91.086mV offset from Tri in opposite polarity. The higher the frequency of your triangle wave, the greater the offset you'll need, which also means you'll have to increase the peak to peak voltage of Tri proportionally. The higher the frequency of the triangle wave, the less practical this approach becomes, as the triangle wave will need to have a pretty high p-p voltage at higher frequencies to obtain sufficient dead time.

    Another possibility is to feed the outputs of the comparators through non-symmetrical RC networks, then Schmitt trigger inverters to square the waveforms back up and get their polarities correct for driving the bridge. See the attached. Values of R and C will depend on the actual measured thresholds of the devices used, as this can vary a good bit depending on manufacturer, batch, etc. You might instead use comparators for the delay, but that would involve more ICs and resistors for setting thresholds, etc.

    In the simulation, in1 would be the output from the tri/sine comparator. The RC delays plus the schmitt triggers and inversions create the output drive signals that include dead time.
     
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