push pull PWM

Discussion in 'General Electronics Chat' started by fiero128, May 30, 2012.

  1. fiero128

    Thread Starter New Member

    May 13, 2012
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    hey
    there was some where here a schematic for a 24-26 V PWM. does anyone know where it is ?:confused:
    I know it was using MOS FETs in push pull.
    I can't find it, I need a link or something.
    or if anyone has a schematic for this PWM that will work on 24V DC

    Allen
    :cool:
     
  2. PaulEE

    Member

    Dec 23, 2011
    423
    32
    Help us help you. Some detail?
     
  3. fiero128

    Thread Starter New Member

    May 13, 2012
    13
    0
    I don't know if it was on this site or not.
    But I need to build a PWM to run off 24 V DC
    I have a good 12 V one but it does not work for long on 24v
    the NE555 with a 7812 regulator does work only of you never pass 3 amps.
    I am pulling 5 to 6 amps for long periods and 50-70 amps for 5 nano seconds and thats what kills the 12 v PWMs
     
  4. PaulEE

    Member

    Dec 23, 2011
    423
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    Can you post the schematic of what you've got for +12V? Chances are, a few simple modifications would allow you to use it for +24V...
     
  5. fiero128

    Thread Starter New Member

    May 13, 2012
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    getting the NE555 to run off 24 V with a 7812 reg.is easy and allowing the transistors to switch the whole 24v can be done , while using the load on the the drain.
    but i want to use push pull to have less work for the FETS.
    The circuit is just a NE555 with PIN 3 as always the output
     
  6. PaulEE

    Member

    Dec 23, 2011
    423
    32
    Push-pull usually implies a P and N channel mosfet or npn/pnp transistor pair that amplifies only half of the wave, positive or negative peak, such that only one transistor is on for 1/2 (usually a bit more) of the time.

    An H-bridge is a device that allows a user to steer current one way or another through a load WITHOUT the use of a dual polarity supply.

    You explained to me that the circuit is literally a 555 and a couple of fets, and then you answered your own question....

    If by stating that you don't want to load the fets you mean you'd like to drive the gates of the fets high/low enough to cause their on resistance to be minimal, you must use gate driver device - as in, transistor or actual gate driver chip, logic buffer, etc.

    Also, since, at any one time, caddy-corner transistors (top left, bottom right or top right, bottom left) are on at a time, you'd probably want to implement some simple logic to be sure two transistors on the same side are NEVER on at the same time, for obvious reasons.

    I have designed precisely what you're talking about but do not have the schematic readily available. It had two 7400 series logic chips, four 2n2222 buffer devices for the gates, ran on 24v, and had a "direction" and "PWM input" set of pins. All the resistors on the transistor bases and collectors were 1k and the gate signals were taken off the collectors. I derived the logic by hand with a truth table and a karnaugh map (on the back of a paper plate, I might add)...
     
  7. fiero128

    Thread Starter New Member

    May 13, 2012
    13
    0
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