Pulse generator-capacitance multiplier

Discussion in 'General Electronics Chat' started by Pooja Shankar, Mar 10, 2013.

  1. Pooja Shankar

    Thread Starter New Member

    Feb 20, 2013
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    Hey
    Can someone explain the working of a capacitance multiplier circuit . The capacitance multiplier is connected to an astable multivibrator circuit which will produce a train of pulses(more like a pulse generator).But changes in the capacitance multiplier is not reflected in the circuit when simulated. Is there any reason that this effect is not seen in the astable multivibrator circuit. The capacitance multiplier is used because we have a restriction in the capacitance value that can be used. To vary the duty cycle and pulse width we need a capaitance of range 5.1nf to 51.5uf and the restriction given is 1uf
     
  2. antonv

    Member

    Nov 27, 2012
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  3. t_n_k

    AAC Fanatic!

    Mar 6, 2009
    5,448
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    @ Pooja Shankar

    Yes - antonv is correct.

    Check your Cap multiplier section of the schematic. As another reference point I would look at NS operational amplifier circuit collection AN31 - readily available on the web. Capacitance multiplier examples are given therein.

    Or at least check your own source for this part of the schematic to verify you have it right.
     
  4. Pooja Shankar

    Thread Starter New Member

    Feb 20, 2013
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    0
    Extremely sorry ,posted the wrong circuit in a hurry. I have enclosed the proper circuit and the circuit has been connected properly. The point is I was told the capacitance multiplier multiplies the gain with the capacitance and this effect is seen at the input. In this particular capacitance multiplier circuit the transfer function is given by c*R2*R3/R1*R4 but the particular effect was not seen when connected to the astable multivibartor. Am not sure if the above explanation is right.I was told it was based on Millers effect.So is the effect of capacitance multiplier seen from the input side?
    The exact Problem statement :Without using a microcontroller or a dedicated timer IC, implement a circuit which, when a trigger is applied , will provide a +ve train of pulses of amplitude 3V, whose width can be varied from 0.1ms to 1s. You may not use any capacitor greater than 1uF or resistor larger than 470kohm. You are provided with op-amps which operate off + or – 10V. Provide a provision to continuously vary the duty cycle from 25% to 75%
    Thank u for your feedback
     
  5. t_n_k

    AAC Fanatic!

    Mar 6, 2009
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    After checking your schematic I agree the relevant sub-circuit acts as capacitance multiplier. I have the equivalent capacitance as R2*R4*C/(R1*R3) based on my analysis using your notations for R's.

    I don't have access to a simulation software at present so I can't verify if your design will work as you anticipate. The only limitation might be the allowable signal excursions at the virtual capacitor input node before non-linear behavior results.

    I notice from your specification that you need a 4-decade frequency span. This is quite a challenge and possibly not achievable with your circuit solution.

    Try Google to see what you can find on 4-decade square wave oscillator. I found something but since this looks like homework I'm leaving it to you to find something yourself.
     
    Last edited: Mar 12, 2013
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