The prior scematic is one of the full adders the sim signals are just some random cables from the inputs . The problem is that signals with valid values get into the adders and get out like X value signalsI can't correlate this schematic to the sim signals next to it or to the prior schematic.
It is from the first FA, there are uper layers as well that i can put here if it helps the "gez" is the ending of level1.stagez i think you will understand once i provide the other screenshots . As for the adder i even used the build in component for 2 bit addition from the digprim library and i still got x sumBut I can't tell WHICH adder the first sim results are from. I'm looking for a reference designator in the second schematic that ends in "gez" and I don't see one.
Have you simulated the full adder separately and shown that it behaves as expected for all possible inputs? Since it only has three inputs, that shouldn't take long to set up.
Hello WBanh i spent many hours working on it testing different stuff etc and i managed to make it work. The problem was the names of the cables and buses i still have not understood how exactly it works but still thats the solution to the problem.Have you simulated JUST this part of the circuit, completely disconnected from all higher level circuitry?