Provision for faster discharge of the gate of a MOSFET

Discussion in 'The Projects Forum' started by gdylp2004, Jan 12, 2012.

  1. gdylp2004

    Thread Starter Member

    Dec 2, 2011
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    Hi guys,


    As seen in the attached schematic, the PWM controls the nMOS by charging and discharging the gate accordingly. While running the buck for a min or two, the MOSFET's TO-220 package temperature rised to about >160 °C and I've burnt 2 nMOS before (note that the max. absolute temperature rating for the IRF640N is 150 °C).


    To tackle the prob, I've added a diode anti-parallel with Rgate to provide an alternate path for the gate to discharge upon turning off. However, when I observed my o-scope under the 2 conditions (with and w/o diode), there seems no significant change is the dv/dt of the gate-source voltage. It remains at about 350ns.


    Do anyone know why? Could it be the diode's intrisic resistance is also close to 5.6Ω as well?


    The diode I used is MUR120 Ultra-fast recovery diode.
     
    Last edited: Jan 12, 2012
  2. joeyd999

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    Jun 6, 2011
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    Your schematic didn't come through.

    Oops...there it is.
     
  3. joeyd999

    AAC Fanatic!

    Jun 6, 2011
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    Channel 2 is the gate? If I am reading it correctly, you've got a 250mV gate drive. *That* would be your problem. I wouldn't drive the IRF640 with less than 10V.

    There are better MOSFETs you can use for this app.

    What is the value of HV? And what is the desired output current?

    Edit: And what is the max switching current?
     
  4. gdylp2004

    Thread Starter Member

    Dec 2, 2011
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    Hi Joey,

    I am using a differential probe to measure Vgs. 100mV/div represents 5V/div, it is an inbuilt step down feature of the diff. probe.

    The gate drive current I believe is in 200+mA range. The gate driver is this: http://www.farnell.com/datasheets/59982.pdf

    I've infact changed the IRF640NPbF into IRFB4227PbF. The waveform looks more "lousy" now as it takes longer time to charge (see IRFB4227PbF_Vgs.jpg).

    Whole schematic is also attached with HV info. O/P current in about 3.5A range.

    Thank you for your help.
     
  5. joeyd999

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    Jun 6, 2011
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    The 'funny' transitions you see at the 5V point is caused by gate charge injection, I think. This is when Vds changes rapidly (from off to on or on to off), and the rate-of-change of drain voltage forces charge into or out of the gate.

    Nothing can help that except for even stiffer drive (a passive diode is not going to help much, IMHO).

    What is your output voltage and duty cycle (or duty cycle range)?
     
  6. gdylp2004

    Thread Starter Member

    Dec 2, 2011
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    O/p voltage is 28V and duty cycle is 28%.

    I already have a thread started on my buck converter design: http://forum.allaboutcircuits.com/showthread.php?t=62817&page=9, if you're interested.
     
  7. joeyd999

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    Jun 6, 2011
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  8. thatoneguy

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    Feb 19, 2009
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    The inductance of the breadboard and those long wires are going to add a very noticeable delay.

    Try to shorten the wires and get as much onto the perfboard as possible, then measure again.
     
  9. gdylp2004

    Thread Starter Member

    Dec 2, 2011
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    Yes sir, I think I really need to solder everything on a board and start observing. But one bad thing is there is a lot restriction in getting current reading as I no longer can connect my DMM in series anymore. :(
     
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